]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: Enable GPIO for Broadcom NS2 SoC
authorYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Fri, 4 Mar 2016 10:23:30 +0000 (05:23 -0500)
committerFlorian Fainelli <f.fainelli@gmail.com>
Tue, 31 May 2016 18:00:26 +0000 (11:00 -0700)
This enables the GPIO support for Broadcom NS2 SoC

Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm64/boot/dts/broadcom/ns2.dtsi

index 4e48b86a9e928b5daceb173fe7e32a66fb53d322..788ed8f9f2bc42900f4924b1d8d654a64ea6e7c6 100644 (file)
@@ -258,6 +258,15 @@ pinctrl: pinctrl@6501d130 {
                              <0x660009b0 0x40>;
                };
 
+               gpio_aon: gpio@65024800 {
+                       compatible = "brcm,iproc-gpio";
+                       reg = <0x65024800 0x50>,
+                             <0x65024008 0x18>;
+                       ngpios = <6>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+               };
+
                gic: interrupt-controller@65210000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
@@ -328,6 +337,16 @@ wdt0: watchdog@66090000 {
                        clock-names = "wdogclk", "apb_pclk";
                };
 
+               gpio_g: gpio@660a0000 {
+                       compatible = "brcm,iproc-gpio";
+                       reg = <0x660a0000 0x50>;
+                       ngpios = <32>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                i2c1: i2c@660b0000 {
                        compatible = "brcm,iproc-i2c";
                        reg = <0x660b0000 0x100>;