]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: qcom: pm8941: add interrupt controller properties
authorBrian Masney <masneyb@onstation.org>
Sat, 19 Jan 2019 20:42:45 +0000 (15:42 -0500)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 24 Jan 2019 14:33:33 +0000 (15:33 +0100)
Add interrupt controller properties now that spmi-gpio is a proper
hierarchical IRQ chip. The interrupts property is no longer needed so
remove it. Code was tested on the LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/qcom-pm8941.dtsi

index 2515c5c217ac1ff8776863862aed73d2bcf4d65b..e65049e0fb452407795e7ebf0a79c3d79bd68e98 100644 (file)
@@ -64,42 +64,8 @@ pm8941_gpios: gpios@c000 {
                        reg = <0xc000>;
                        gpio-controller;
                        #gpio-cells = <2>;
-                       interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
-                                    <0 0xc1 0 IRQ_TYPE_NONE>,
-                                    <0 0xc2 0 IRQ_TYPE_NONE>,
-                                    <0 0xc3 0 IRQ_TYPE_NONE>,
-                                    <0 0xc4 0 IRQ_TYPE_NONE>,
-                                    <0 0xc5 0 IRQ_TYPE_NONE>,
-                                    <0 0xc6 0 IRQ_TYPE_NONE>,
-                                    <0 0xc7 0 IRQ_TYPE_NONE>,
-                                    <0 0xc8 0 IRQ_TYPE_NONE>,
-                                    <0 0xc9 0 IRQ_TYPE_NONE>,
-                                    <0 0xca 0 IRQ_TYPE_NONE>,
-                                    <0 0xcb 0 IRQ_TYPE_NONE>,
-                                    <0 0xcc 0 IRQ_TYPE_NONE>,
-                                    <0 0xcd 0 IRQ_TYPE_NONE>,
-                                    <0 0xce 0 IRQ_TYPE_NONE>,
-                                    <0 0xcf 0 IRQ_TYPE_NONE>,
-                                    <0 0xd0 0 IRQ_TYPE_NONE>,
-                                    <0 0xd1 0 IRQ_TYPE_NONE>,
-                                    <0 0xd2 0 IRQ_TYPE_NONE>,
-                                    <0 0xd3 0 IRQ_TYPE_NONE>,
-                                    <0 0xd4 0 IRQ_TYPE_NONE>,
-                                    <0 0xd5 0 IRQ_TYPE_NONE>,
-                                    <0 0xd6 0 IRQ_TYPE_NONE>,
-                                    <0 0xd7 0 IRQ_TYPE_NONE>,
-                                    <0 0xd8 0 IRQ_TYPE_NONE>,
-                                    <0 0xd9 0 IRQ_TYPE_NONE>,
-                                    <0 0xda 0 IRQ_TYPE_NONE>,
-                                    <0 0xdb 0 IRQ_TYPE_NONE>,
-                                    <0 0xdc 0 IRQ_TYPE_NONE>,
-                                    <0 0xdd 0 IRQ_TYPE_NONE>,
-                                    <0 0xde 0 IRQ_TYPE_NONE>,
-                                    <0 0xdf 0 IRQ_TYPE_NONE>,
-                                    <0 0xe0 0 IRQ_TYPE_NONE>,
-                                    <0 0xe1 0 IRQ_TYPE_NONE>,
-                                    <0 0xe2 0 IRQ_TYPE_NONE>,
-                                    <0 0xe3 0 IRQ_TYPE_NONE>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
 
                        boost_bypass_n_pin: boost-bypass {
                                pins = "gpio21";