]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ASoC: Intel: Skylake: Add Cometlake PCI IDs
authorEvan Green <evgreen@chromium.org>
Fri, 10 May 2019 22:39:29 +0000 (15:39 -0700)
committerMark Brown <broonie@kernel.org>
Mon, 13 May 2019 11:42:15 +0000 (12:42 +0100)
Add PCI IDs for Intel CometLake platforms, which from a software
point of view are extremely similar to Cannonlake platforms.

Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/Kconfig
sound/soc/intel/skylake/skl-messages.c
sound/soc/intel/skylake/skl.c

index fc1396adde714088fcc4be0e9ee18421e5e3ab03..b089ed3bf77f6848ef0b425bb0b61fa7f10c7ae0 100644 (file)
@@ -165,6 +165,22 @@ config SND_SOC_INTEL_CFL
          If you have a Intel CoffeeLake platform with the DSP
          enabled in the BIOS then enable this option by saying Y or m.
 
+config SND_SOC_INTEL_CML_H
+       tristate "CometLake-H Platforms"
+       depends on PCI && ACPI
+       select SND_SOC_INTEL_SKYLAKE_FAMILY
+       help
+         If you have a Intel CometLake-H platform with the DSP
+         enabled in the BIOS then enable this option by saying Y or m.
+
+config SND_SOC_INTEL_CML_LP
+       tristate "CometLake-LP Platforms"
+       depends on PCI && ACPI
+       select SND_SOC_INTEL_SKYLAKE_FAMILY
+       help
+         If you have a Intel CometLake-LP platform with the DSP
+         enabled in the BIOS then enable this option by saying Y or m.
+
 config SND_SOC_INTEL_SKYLAKE_FAMILY
        tristate
        select SND_SOC_INTEL_SKYLAKE_COMMON
index 4bf70b4429f03075b07d877c67f6003d15d5336d..df01dc9525217110550a6dbcaa85541175552218 100644 (file)
@@ -255,6 +255,22 @@ static const struct skl_dsp_ops dsp_ops[] = {
                .init_fw = cnl_sst_init_fw,
                .cleanup = cnl_sst_dsp_cleanup
        },
+       {
+               .id = 0x02c8,
+               .num_cores = 4,
+               .loader_ops = bxt_get_loader_ops,
+               .init = cnl_sst_dsp_init,
+               .init_fw = cnl_sst_init_fw,
+               .cleanup = cnl_sst_dsp_cleanup
+       },
+       {
+               .id = 0x06c8,
+               .num_cores = 4,
+               .loader_ops = bxt_get_loader_ops,
+               .init = cnl_sst_dsp_init,
+               .init_fw = cnl_sst_init_fw,
+               .cleanup = cnl_sst_dsp_cleanup
+       },
 };
 
 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
index 4ed5b7e17d44aad3e09e6d6a8726ae3742bc92a1..f864f7b3df3a5064ee0a94d9025c067aa67a8412 100644 (file)
@@ -1166,6 +1166,16 @@ static const struct pci_device_id skl_ids[] = {
        /* CFL */
        { PCI_DEVICE(0x8086, 0xa348),
                .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
+#endif
+#if IS_ENABLED(CONFIG_SND_SOC_INTEL_CML_LP)
+       /* CML-LP */
+       { PCI_DEVICE(0x8086, 0x02c8),
+               .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
+#endif
+#if IS_ENABLED(CONFIG_SND_SOC_INTEL_CML_H)
+       /* CML-H */
+       { PCI_DEVICE(0x8086, 0x06c8),
+               .driver_data = (unsigned long)&snd_soc_acpi_intel_cnl_machines},
 #endif
        { 0, }
 };