usb: dwc3: gadget: Fix dead code writing GCTL.RAMCLKSEL

The register programming code in dwc2_updated_ram_clk_sel() will never
be executed. And in fact the entire function can be removed as there is
no way to override the default value of GCTL.RAMCLKSEL. Remove the
function and add a comment explaining where GCTL.RAMCLKSEL should be
programmed if needed in the future.

This fixes dead code warnings in coverity.

Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 22ccc346af2fa1a4cab881b30bb3399f2dc430b6..230ffa395dc3268c603699abc9cb34636c9658a6 100644 (file)
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2468,32 +2468,6 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
        dwc3_writel(dwc->regs, DWC3_DCFG, reg);
 }
 
-static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
-{
-       u32 reg;
-       u32 usb30_clock = DWC3_GCTL_CLK_BUS;
-
-       /*
-        * We change the clock only at SS but I dunno why I would want to do
-        * this. Maybe it becomes part of the power saving plan.
-        */
-
-       if ((speed != DWC3_DSTS_SUPERSPEED) &&
-           (speed != DWC3_DSTS_SUPERSPEED_PLUS))
-               return;
-
-       /*
-        * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
-        * each time on Connect Done.
-        */
-       if (!usb30_clock)
-               return;
-
-       reg = dwc3_readl(dwc->regs, DWC3_GCTL);
-       reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
-       dwc3_writel(dwc->regs, DWC3_GCTL, reg);
-}
-
 static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
 {
        struct dwc3_ep          *dep;
@@ -2505,7 +2479,14 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
        speed = reg & DWC3_DSTS_CONNECTSPD;
        dwc->speed = speed;
 
-       dwc3_update_ram_clk_sel(dwc, speed);
+       /*
+        * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
+        * each time on Connect Done.
+        *
+        * Currently we always use the reset value. If any platform
+        * wants to set this to a different value, we need to add a
+        * setting and update GCTL.RAMCLKSEL here.
+        */
 
        switch (speed) {
        case DWC3_DSTS_SUPERSPEED_PLUS: