drivers: clk: zynqmp: Allow zero divisor value

Zero divider is valid and default for some of ZynqMP
clocks. Allow zero divisor when CLK_DIVIDER_ALLOW_ZERO
for the clock is set.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c
index a371c66e72ef682d04655e2eaa0e288475380727..e146b6fac6b210cf0a06667a542c254b34e3f609 100644 (file)
--- a/drivers/clk/zynqmp/divider.c
+++ b/drivers/clk/zynqmp/divider.c
@@ -76,6 +76,13 @@ static unsigned long zynqmp_clk_divider_recalc_rate(struct clk_hw *hw,
        else
                value = div >> 16;
 
+       if (!value) {
+               WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO),
+                    "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
+                    clk_name);
+               return parent_rate;
+       }
+
        return DIV_ROUND_UP_ULL(parent_rate, value);
 }