drm/amdgpu: use designated initializers

Prepare to mark sensitive kernel structures for randomization by making
sure they're using designated initializers. These were identified during
allyesconfig builds of x86, arm, and arm64, with most initializer fixes
extracted from grsecurity.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 4c851fde1e82231d04366b1916da170d0b24cb0e..af65c24cefe39cd2796981787e38c17dc1f0b777 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -1200,51 +1200,51 @@ static int amdgpu_cgs_call_acpi_method(struct cgs_device *cgs_device,
 }
 
 static const struct cgs_ops amdgpu_cgs_ops = {
-       amdgpu_cgs_gpu_mem_info,
-       amdgpu_cgs_gmap_kmem,
-       amdgpu_cgs_gunmap_kmem,
-       amdgpu_cgs_alloc_gpu_mem,
-       amdgpu_cgs_free_gpu_mem,
-       amdgpu_cgs_gmap_gpu_mem,
-       amdgpu_cgs_gunmap_gpu_mem,
-       amdgpu_cgs_kmap_gpu_mem,
-       amdgpu_cgs_kunmap_gpu_mem,
-       amdgpu_cgs_read_register,
-       amdgpu_cgs_write_register,
-       amdgpu_cgs_read_ind_register,
-       amdgpu_cgs_write_ind_register,
-       amdgpu_cgs_read_pci_config_byte,
-       amdgpu_cgs_read_pci_config_word,
-       amdgpu_cgs_read_pci_config_dword,
-       amdgpu_cgs_write_pci_config_byte,
-       amdgpu_cgs_write_pci_config_word,
-       amdgpu_cgs_write_pci_config_dword,
-       amdgpu_cgs_get_pci_resource,
-       amdgpu_cgs_atom_get_data_table,
-       amdgpu_cgs_atom_get_cmd_table_revs,
-       amdgpu_cgs_atom_exec_cmd_table,
-       amdgpu_cgs_create_pm_request,
-       amdgpu_cgs_destroy_pm_request,
-       amdgpu_cgs_set_pm_request,
-       amdgpu_cgs_pm_request_clock,
-       amdgpu_cgs_pm_request_engine,
-       amdgpu_cgs_pm_query_clock_limits,
-       amdgpu_cgs_set_camera_voltages,
-       amdgpu_cgs_get_firmware_info,
-       amdgpu_cgs_rel_firmware,
-       amdgpu_cgs_set_powergating_state,
-       amdgpu_cgs_set_clockgating_state,
-       amdgpu_cgs_get_active_displays_info,
-       amdgpu_cgs_notify_dpm_enabled,
-       amdgpu_cgs_call_acpi_method,
-       amdgpu_cgs_query_system_info,
-       amdgpu_cgs_is_virtualization_enabled
+       .gpu_mem_info = amdgpu_cgs_gpu_mem_info,
+       .gmap_kmem = amdgpu_cgs_gmap_kmem,
+       .gunmap_kmem = amdgpu_cgs_gunmap_kmem,
+       .alloc_gpu_mem = amdgpu_cgs_alloc_gpu_mem,
+       .free_gpu_mem = amdgpu_cgs_free_gpu_mem,
+       .gmap_gpu_mem = amdgpu_cgs_gmap_gpu_mem,
+       .gunmap_gpu_mem = amdgpu_cgs_gunmap_gpu_mem,
+       .kmap_gpu_mem = amdgpu_cgs_kmap_gpu_mem,
+       .kunmap_gpu_mem = amdgpu_cgs_kunmap_gpu_mem,
+       .read_register = amdgpu_cgs_read_register,
+       .write_register = amdgpu_cgs_write_register,
+       .read_ind_register = amdgpu_cgs_read_ind_register,
+       .write_ind_register = amdgpu_cgs_write_ind_register,
+       .read_pci_config_byte = amdgpu_cgs_read_pci_config_byte,
+       .read_pci_config_word = amdgpu_cgs_read_pci_config_word,
+       .read_pci_config_dword = amdgpu_cgs_read_pci_config_dword,
+       .write_pci_config_byte = amdgpu_cgs_write_pci_config_byte,
+       .write_pci_config_word = amdgpu_cgs_write_pci_config_word,
+       .write_pci_config_dword = amdgpu_cgs_write_pci_config_dword,
+       .get_pci_resource = amdgpu_cgs_get_pci_resource,
+       .atom_get_data_table = amdgpu_cgs_atom_get_data_table,
+       .atom_get_cmd_table_revs = amdgpu_cgs_atom_get_cmd_table_revs,
+       .atom_exec_cmd_table = amdgpu_cgs_atom_exec_cmd_table,
+       .create_pm_request = amdgpu_cgs_create_pm_request,
+       .destroy_pm_request = amdgpu_cgs_destroy_pm_request,
+       .set_pm_request = amdgpu_cgs_set_pm_request,
+       .pm_request_clock = amdgpu_cgs_pm_request_clock,
+       .pm_request_engine = amdgpu_cgs_pm_request_engine,
+       .pm_query_clock_limits = amdgpu_cgs_pm_query_clock_limits,
+       .set_camera_voltages = amdgpu_cgs_set_camera_voltages,
+       .get_firmware_info = amdgpu_cgs_get_firmware_info,
+       .rel_firmware = amdgpu_cgs_rel_firmware,
+       .set_powergating_state = amdgpu_cgs_set_powergating_state,
+       .set_clockgating_state = amdgpu_cgs_set_clockgating_state,
+       .get_active_displays_info = amdgpu_cgs_get_active_displays_info,
+       .notify_dpm_enabled = amdgpu_cgs_notify_dpm_enabled,
+       .call_acpi_method = amdgpu_cgs_call_acpi_method,
+       .query_system_info = amdgpu_cgs_query_system_info,
+       .is_virtualization_enabled = amdgpu_cgs_is_virtualization_enabled,
 };
 
 static const struct cgs_os_ops amdgpu_cgs_os_ops = {
-       amdgpu_cgs_add_irq_source,
-       amdgpu_cgs_irq_get,
-       amdgpu_cgs_irq_put
+       .add_irq_source = amdgpu_cgs_add_irq_source,
+       .irq_get = amdgpu_cgs_irq_get,
+       .irq_put = amdgpu_cgs_irq_put
 };
 
 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index c6c125d311619c1dd2d8d76b933236bacb42d2d2..e4eb6dd3798a99a526574ae24d29905ed9d70b45 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -243,9 +243,9 @@ static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man,
 }
 
 const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = {
-       amdgpu_gtt_mgr_init,
-       amdgpu_gtt_mgr_fini,
-       amdgpu_gtt_mgr_new,
-       amdgpu_gtt_mgr_del,
-       amdgpu_gtt_mgr_debug
+       .init = amdgpu_gtt_mgr_init,
+       .takedown = amdgpu_gtt_mgr_fini,
+       .get_node = amdgpu_gtt_mgr_new,
+       .put_node = amdgpu_gtt_mgr_del,
+       .debug = amdgpu_gtt_mgr_debug
 };

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
index 6bb79c94cb9ffb5d7bec4fb104f9e32b7c3b3046..3eccac735db315bd43892b3891ee508d0287c945 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
@@ -240,10 +240,16 @@ int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
 
 static const struct phm_master_table_item cz_enable_clock_power_gatings_list[] = {
        /*we don't need an exit table here, because there is only D3 cold on Kv*/
-       { phm_cf_want_uvd_power_gating, cz_tf_uvd_power_gating_initialize },
-       { phm_cf_want_vce_power_gating, cz_tf_vce_power_gating_initialize },
+       {
+         .isFunctionNeededInRuntimeTable = phm_cf_want_uvd_power_gating,
+         .tableFunction = cz_tf_uvd_power_gating_initialize
+       },
+       {
+         .isFunctionNeededInRuntimeTable = phm_cf_want_vce_power_gating,
+         .tableFunction = cz_tf_vce_power_gating_initialize
+       },
        /* to do { NULL, cz_tf_xdma_power_gating_enable }, */
-       { NULL, NULL }
+       { }
 };
 
 const struct phm_master_table_header cz_phm_enable_clock_power_gatings_master = {

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 0fb4e8c8f5e13866120de7325dd801c59f1d940f..9b7aa43f3921685925708262b8e0bd41c6f3b839 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -888,13 +888,13 @@ static int cz_tf_update_low_mem_pstate(struct pp_hwmgr *hwmgr,
 }
 
 static const struct phm_master_table_item cz_set_power_state_list[] = {
-       {NULL, cz_tf_update_sclk_limit},
-       {NULL, cz_tf_set_deep_sleep_sclk_threshold},
-       {NULL, cz_tf_set_watermark_threshold},
-       {NULL, cz_tf_set_enabled_levels},
-       {NULL, cz_tf_enable_nb_dpm},
-       {NULL, cz_tf_update_low_mem_pstate},
-       {NULL, NULL}
+       { .tableFunction = cz_tf_update_sclk_limit },
+       { .tableFunction = cz_tf_set_deep_sleep_sclk_threshold },
+       { .tableFunction = cz_tf_set_watermark_threshold },
+       { .tableFunction = cz_tf_set_enabled_levels },
+       { .tableFunction = cz_tf_enable_nb_dpm },
+       { .tableFunction = cz_tf_update_low_mem_pstate },
+       { }
 };
 
 static const struct phm_master_table_header cz_set_power_state_master = {
@@ -904,15 +904,15 @@ static const struct phm_master_table_header cz_set_power_state_master = {
 };
 
 static const struct phm_master_table_item cz_setup_asic_list[] = {
-       {NULL, cz_tf_reset_active_process_mask},
-       {NULL, cz_tf_upload_pptable_to_smu},
-       {NULL, cz_tf_init_sclk_limit},
-       {NULL, cz_tf_init_uvd_limit},
-       {NULL, cz_tf_init_vce_limit},
-       {NULL, cz_tf_init_acp_limit},
-       {NULL, cz_tf_init_power_gate_state},
-       {NULL, cz_tf_init_sclk_threshold},
-       {NULL, NULL}
+       { .tableFunction = cz_tf_reset_active_process_mask },
+       { .tableFunction = cz_tf_upload_pptable_to_smu },
+       { .tableFunction = cz_tf_init_sclk_limit },
+       { .tableFunction = cz_tf_init_uvd_limit },
+       { .tableFunction = cz_tf_init_vce_limit },
+       { .tableFunction = cz_tf_init_acp_limit },
+       { .tableFunction = cz_tf_init_power_gate_state },
+       { .tableFunction = cz_tf_init_sclk_threshold },
+       { }
 };
 
 static const struct phm_master_table_header cz_setup_asic_master = {
@@ -957,10 +957,10 @@ static int cz_tf_reset_cc6_data(struct pp_hwmgr *hwmgr,
 }
 
 static const struct phm_master_table_item cz_power_down_asic_list[] = {
-       {NULL, cz_tf_power_up_display_clock_sys_pll},
-       {NULL, cz_tf_clear_nb_dpm_flag},
-       {NULL, cz_tf_reset_cc6_data},
-       {NULL, NULL}
+       { .tableFunction = cz_tf_power_up_display_clock_sys_pll },
+       { .tableFunction = cz_tf_clear_nb_dpm_flag },
+       { .tableFunction = cz_tf_reset_cc6_data },
+       { }
 };
 
 static const struct phm_master_table_header cz_power_down_asic_master = {
@@ -1068,8 +1068,8 @@ static int cz_tf_check_for_dpm_enabled(struct pp_hwmgr *hwmgr,
 }
 
 static const struct phm_master_table_item cz_disable_dpm_list[] = {
-       { NULL, cz_tf_check_for_dpm_enabled},
-       {NULL, NULL},
+       { .tableFunction = cz_tf_check_for_dpm_enabled },
+       { },
 };
 
 
@@ -1080,13 +1080,13 @@ static const struct phm_master_table_header cz_disable_dpm_master = {
 };
 
 static const struct phm_master_table_item cz_enable_dpm_list[] = {
-       { NULL, cz_tf_check_for_dpm_disabled },
-       { NULL, cz_tf_program_voting_clients },
-       { NULL, cz_tf_start_dpm},
-       { NULL, cz_tf_program_bootup_state},
-       { NULL, cz_tf_enable_didt },
-       { NULL, cz_tf_reset_acp_boot_level },
-       {NULL, NULL},
+       { .tableFunction = cz_tf_check_for_dpm_disabled },
+       { .tableFunction = cz_tf_program_voting_clients },
+       { .tableFunction = cz_tf_start_dpm },
+       { .tableFunction = cz_tf_program_bootup_state },
+       { .tableFunction = cz_tf_enable_didt },
+       { .tableFunction = cz_tf_reset_acp_boot_level },
+       { },
 };
 
 static const struct phm_master_table_header cz_enable_dpm_master = {

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c
index 29d0319b22e6c68cfa46466ad13d795a7a7f37cf..a0e4adee932523d987f53aebfebcce985dabe421 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c
@@ -506,18 +506,18 @@ static int tf_smu7_thermal_disable_alert(struct pp_hwmgr *hwmgr,
 
 static const struct phm_master_table_item
 phm_thermal_start_thermal_controller_master_list[] = {
-       {NULL, tf_smu7_thermal_initialize},
-       {NULL, tf_smu7_thermal_set_temperature_range},
-       {NULL, tf_smu7_thermal_enable_alert},
-       {NULL, smum_thermal_avfs_enable},
+       { .tableFunction = tf_smu7_thermal_initialize },
+       { .tableFunction = tf_smu7_thermal_set_temperature_range },
+       { .tableFunction = tf_smu7_thermal_enable_alert },
+       { .tableFunction = smum_thermal_avfs_enable },
 /* We should restrict performance levels to low before we halt the SMC.
  * On the other hand we are still in boot state when we do this
  * so it would be pointless.
  * If this assumption changes we have to revisit this table.
  */
-       {NULL, smum_thermal_setup_fan_table},
-       {NULL, tf_smu7_thermal_start_smc_fan_control},
-       {NULL, NULL}
+       { .tableFunction = smum_thermal_setup_fan_table },
+       { .tableFunction = tf_smu7_thermal_start_smc_fan_control },
+       { }
 };
 
 static const struct phm_master_table_header
@@ -529,10 +529,10 @@ phm_thermal_start_thermal_controller_master = {
 
 static const struct phm_master_table_item
 phm_thermal_set_temperature_range_master_list[] = {
-       {NULL, tf_smu7_thermal_disable_alert},
-       {NULL, tf_smu7_thermal_set_temperature_range},
-       {NULL, tf_smu7_thermal_enable_alert},
-       {NULL, NULL}
+       { .tableFunction = tf_smu7_thermal_disable_alert },
+       { .tableFunction = tf_smu7_thermal_set_temperature_range },
+       { .tableFunction = tf_smu7_thermal_enable_alert },
+       { }
 };
 
 static const struct phm_master_table_header