]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
clk: renesas: r8a77995: Add missing CPEX clock
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 21 Nov 2018 09:32:23 +0000 (10:32 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 4 Dec 2018 09:30:05 +0000 (10:30 +0100)
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added
the CPEX clock on R-Car D3.  This clock can be selected as a clock
source for CMT1 (Compare Match Timer Type 1).

Add the missing clock to the DT bindings header, and implement support
for it in the clock driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/renesas/r8a77995-cpg-mssr.c
include/dt-bindings/clock/r8a77995-cpg-mssr.h

index f2636a34c96c08ca5d358a1881d92bbecf6d76b6..b9745665731fac7ea6baee9beb1b284a43a70d01 100644 (file)
@@ -22,7 +22,7 @@
 
 enum clk_ids {
        /* Core Clock Outputs exported to DT */
-       LAST_DT_CORE_CLK = R8A77995_CLK_CP,
+       LAST_DT_CORE_CLK = R8A77995_CLK_CPEX,
 
        /* External Input Clocks */
        CLK_EXTAL,
@@ -92,6 +92,7 @@ static const struct cpg_core_clk r8a77995_core_clks[] __initconst = {
 
        DEF_FIXED("cl",        R8A77995_CLK_CL,    CLK_PLL1,      48, 1),
        DEF_FIXED("cp",        R8A77995_CLK_CP,    CLK_EXTAL,      2, 1),
+       DEF_FIXED("cpex",      R8A77995_CLK_CPEX,  CLK_EXTAL,      4, 1),
 
        DEF_DIV6_RO("osc",     R8A77995_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),
 
index 80b3c5ec9118b544f9d234b5b8eef9f47856b9e3..fd701c4e87cf0e22ba08fce5c9a2027307466644 100644 (file)
@@ -49,5 +49,6 @@
 #define R8A77995_CLK_LV0               38
 #define R8A77995_CLK_LV1               39
 #define R8A77995_CLK_CP                        40
+#define R8A77995_CLK_CPEX              41
 
 #endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */