]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
authorThierry Reding <treding@nvidia.com>
Mon, 28 Oct 2019 12:37:07 +0000 (13:37 +0100)
committerThierry Reding <treding@nvidia.com>
Mon, 11 Nov 2019 13:55:25 +0000 (14:55 +0100)
All of the devices making up the Tegra DRM device want to share a single
IOMMU domain. Put them into a single group to allow them to do that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/memory/tegra/tegra114.c
drivers/memory/tegra/tegra124.c
drivers/memory/tegra/tegra30.c

index ac8351b5beebe0cba79c12b84e0c803fcf695102..48ef01c3ff90d4f740cb5977a414cc5d5453593b 100644 (file)
@@ -909,16 +909,18 @@ static const struct tegra_smmu_swgroup tegra114_swgroups[] = {
        { .name = "tsec",      .swgroup = TEGRA_SWGROUP_TSEC,      .reg = 0x294 },
 };
 
-static const unsigned int tegra114_group_display[] = {
+static const unsigned int tegra114_group_drm[] = {
        TEGRA_SWGROUP_DC,
        TEGRA_SWGROUP_DCB,
+       TEGRA_SWGROUP_G2,
+       TEGRA_SWGROUP_NV,
 };
 
 static const struct tegra_smmu_group_soc tegra114_groups[] = {
        {
-               .name = "display",
-               .swgroups = tegra114_group_display,
-               .num_swgroups = ARRAY_SIZE(tegra114_group_display),
+               .name = "drm",
+               .swgroups = tegra114_group_drm,
+               .num_swgroups = ARRAY_SIZE(tegra114_group_drm),
        },
 };
 
index 5d0ccb2be20634b574be5366c8e766af4a93b63f..60e827aec79821662fa405fa18b686c45b946d86 100644 (file)
@@ -974,16 +974,18 @@ static const struct tegra_smmu_swgroup tegra124_swgroups[] = {
        { .name = "vi",        .swgroup = TEGRA_SWGROUP_VI,        .reg = 0x280 },
 };
 
-static const unsigned int tegra124_group_display[] = {
+static const unsigned int tegra124_group_drm[] = {
        TEGRA_SWGROUP_DC,
        TEGRA_SWGROUP_DCB,
+       TEGRA_SWGROUP_GPU,
+       TEGRA_SWGROUP_VIC,
 };
 
 static const struct tegra_smmu_group_soc tegra124_groups[] = {
        {
-               .name = "display",
-               .swgroups = tegra124_group_display,
-               .num_swgroups = ARRAY_SIZE(tegra124_group_display),
+               .name = "drm",
+               .swgroups = tegra124_group_drm,
+               .num_swgroups = ARRAY_SIZE(tegra124_group_drm),
        },
 };
 
index 14788fc2f9e88e9e7cc84893d5dbcf27d1c05b0f..8947bee6d0324b9e4744889595d4b388e27f3d2a 100644 (file)
@@ -931,16 +931,19 @@ static const struct tegra_smmu_swgroup tegra30_swgroups[] = {
        { .name = "isp",  .swgroup = TEGRA_SWGROUP_ISP,  .reg = 0x258 },
 };
 
-static const unsigned int tegra30_group_display[] = {
+static const unsigned int tegra30_group_drm[] = {
        TEGRA_SWGROUP_DC,
        TEGRA_SWGROUP_DCB,
+       TEGRA_SWGROUP_G2,
+       TEGRA_SWGROUP_NV,
+       TEGRA_SWGROUP_NV2,
 };
 
 static const struct tegra_smmu_group_soc tegra30_groups[] = {
        {
-               .name = "display",
-               .swgroups = tegra30_group_display,
-               .num_swgroups = ARRAY_SIZE(tegra30_group_display),
+               .name = "drm",
+               .swgroups = tegra30_group_drm,
+               .num_swgroups = ARRAY_SIZE(tegra30_group_drm),
        },
 };