]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: rockchip: remove unused pin settings from px30
authorHeiko Stuebner <heiko@sntech.de>
Tue, 17 Sep 2019 08:26:54 +0000 (10:26 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 3 Oct 2019 21:24:02 +0000 (23:24 +0200)
These are unused gpio-settings for specific function pins, that
are not used by anything and only clutter up the dtsi.
They can be re-added when a relevant user is added.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20190917082659.25549-8-heiko@sntech.de
arch/arm64/boot/dts/rockchip/px30.dtsi

index f2bbdfa0e4aaa10a9872f9b4e77a2f2063578d53..63499d27994caec7c37b6f6eff6a1f860819ee22 100644 (file)
@@ -1159,11 +1159,6 @@ uart0_rts: uart0-rts {
                                rockchip,pins =
                                        <0 RK_PB5 1 &pcfg_pull_none>;
                        };
-
-                       uart0_rts_gpio: uart0-rts-gpio {
-                               rockchip,pins =
-                                       <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
-                       };
                };
 
                uart1 {
@@ -1182,11 +1177,6 @@ uart1_rts: uart1-rts {
                                rockchip,pins =
                                        <1 RK_PC3 1 &pcfg_pull_none>;
                        };
-
-                       uart1_rts_gpio: uart1-rts-gpio {
-                               rockchip,pins =
-                                       <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
-                       };
                };
 
                uart2-m0 {
@@ -1221,11 +1211,6 @@ uart3m0_rts: uart3m0-rts {
                                rockchip,pins =
                                        <0 RK_PC3 2 &pcfg_pull_none>;
                        };
-
-                       uart3m0_rts_gpio: uart3m0-rts-gpio {
-                               rockchip,pins =
-                                       <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
-                       };
                };
 
                uart3-m1 {
@@ -1244,11 +1229,6 @@ uart3m1_rts: uart3m1-rts {
                                rockchip,pins =
                                        <1 RK_PB5 2 &pcfg_pull_none>;
                        };
-
-                       uart3m1_rts_gpio: uart3m1-rts-gpio {
-                               rockchip,pins =
-                                       <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
-                       };
                };
 
                uart4 {
@@ -1597,16 +1577,6 @@ sdmmc_bus4: sdmmc-bus4 {
                                        <1 RK_PD4 1 &pcfg_pull_up_8ma>,
                                        <1 RK_PD5 1 &pcfg_pull_up_8ma>;
                        };
-
-                       sdmmc_gpio: sdmmc-gpio {
-                               rockchip,pins =
-                                       <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-                                       <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-                                       <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-                                       <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-                                       <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-                                       <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
-                       };
                };
 
                sdio {
@@ -1627,16 +1597,6 @@ sdio_bus4: sdio-bus4 {
                                        <1 RK_PD0 1 &pcfg_pull_up>,
                                        <1 RK_PD1 1 &pcfg_pull_up>;
                        };
-
-                       sdio_gpio: sdio-gpio {
-                               rockchip,pins =
-                                       <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
-                                       <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>,
-                                       <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,
-                                       <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>,
-                                       <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,
-                                       <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
-                       };
                };
 
                emmc {