]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: rockchip: add ARM Mali GPU node for RK3399 SoCs
authorCaesar Wang <wxt@rock-chips.com>
Mon, 17 Jul 2017 08:14:29 +0000 (16:14 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Sat, 22 Jul 2017 21:36:37 +0000 (23:36 +0200)
Add Mali GPU device tree node for the RK3399 SoCs, with devfreq
opp table.

RK3399 and RK3399-OP1 SoCs have a different recommendation table with
gpu opp. Also, the ARM's mali driver found on
https://developer.arm.com/products/software/mali-drivers/midgard-kernel.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index be7fe635f7c15f0e1aac3e7e716305bfd1ee715a..d8a120f945c803ee91e4fdd5a7afa3a8b68ed28a 100644 (file)
@@ -118,6 +118,35 @@ opp08 {
                        opp-microvolt = <1250000>;
                };
        };
+
+       gpu_opp_table: opp-table2 {
+               compatible = "operating-points-v2";
+
+               opp00 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <297000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <825000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <850000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <925000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1075000>;
+               };
+       };
 };
 
 &cpu_l0 {
@@ -143,3 +172,7 @@ &cpu_b0 {
 &cpu_b1 {
        operating-points-v2 = <&cluster1_opp>;
 };
+
+&gpu {
+       operating-points-v2 = <&gpu_opp_table>;
+};
index c83460db130ab35fcf4a37b9c9998de6be87f7d8..81617bcf252272313163f9dc48ef35c077981559 100644 (file)
@@ -110,6 +110,35 @@ opp07 {
                        opp-microvolt = <1200000>;
                };
        };
+
+       gpu_opp_table: opp-table2 {
+               compatible = "operating-points-v2";
+
+               opp00 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <297000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <825000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <875000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <925000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1100000>;
+               };
+       };
 };
 
 &cpu_l0 {
@@ -135,3 +164,7 @@ &cpu_b0 {
 &cpu_b1 {
        operating-points-v2 = <&cluster1_opp>;
 };
+
+&gpu {
+       operating-points-v2 = <&gpu_opp_table>;
+};
index 1cbd7a2f943a34e9d73580062901ebee94003c2a..4a076869d09b59d57d4e15b28e9e1e4af24a2074 100644 (file)
@@ -1443,6 +1443,18 @@ i2s2: i2s@ff8a0000 {
                status = "disabled";
        };
 
+       gpu: gpu@ff9a0000 {
+               compatible = "rockchip,rk3399-mali", "arm,mali-t860";
+               reg = <0x0 0xff9a0000 0x0 0x10000>;
+               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "gpu", "job", "mmu";
+               clocks = <&cru ACLK_GPU>;
+               power-domains = <&power RK3399_PD_GPU>;
+               status = "disabled";
+       };
+
        pinctrl: pinctrl {
                compatible = "rockchip,rk3399-pinctrl";
                rockchip,grf = <&grf>;