drm/i915/display: Extract ilk_read_luts()

For ilk, add hw read out to create hw blob of gamma
lut values.

v4:  -No need to initialize *blob [Jani]
     -Removed right shifts [Jani]
     -Dropped dev local var [Jani]
v5:  -Returned blob instead of assigning it internally within the
      function [Ville]
     -Renamed ilk_get_color_config() to ilk_read_luts() [Ville]
v9:  -80 character limit [Uma]
     -Made read func para as const [Ville, Uma]
     -Renamed ilk_read_gamma_lut() to ilk_read_lut_10() [Uma, Ville]
v10: -Made ilk_read_luts() static [Jani]
     -ilk_load_lut_10 has lut_size, not (lut_size - 1) [Jani]

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1567538578-4489-7-git-send-email-swati2.sharma@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 55076def6a98fdc1538cb5d310b0510d90559bcf..80f82b2bd2848e42f887ee57d47750ceab169bb3 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1556,6 +1556,47 @@ static void i9xx_read_luts(struct intel_crtc_state *crtc_state)
        crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
 }
 
+static struct drm_property_blob *
+ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
+{
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+       u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+       enum pipe pipe = crtc->pipe;
+       struct drm_property_blob *blob;
+       struct drm_color_lut *blob_data;
+       u32 i, val;
+
+       blob = drm_property_create_blob(&dev_priv->drm,
+                                       sizeof(struct drm_color_lut) * lut_size,
+                                       NULL);
+       if (IS_ERR(blob))
+               return NULL;
+
+       blob_data = blob->data;
+
+       for (i = 0; i < lut_size; i++) {
+               val = I915_READ(PREC_PALETTE(pipe, i));
+
+               blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+                                                       PREC_PALETTE_RED_MASK, val), 10);
+               blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+                                                         PREC_PALETTE_GREEN_MASK, val), 10);
+               blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+                                                        PREC_PALETTE_BLUE_MASK, val), 10);
+       }
+
+       return blob;
+}
+
+static void ilk_read_luts(struct intel_crtc_state *crtc_state)
+{
+       if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
+               crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
+       else
+               crtc_state->base.gamma_lut = ilk_read_lut_10(crtc_state);
+}
+
 void intel_color_init(struct intel_crtc *crtc)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1603,8 +1644,10 @@ void intel_color_init(struct intel_crtc *crtc)
                        dev_priv->display.load_luts = bdw_load_luts;
                else if (INTEL_GEN(dev_priv) >= 7)
                        dev_priv->display.load_luts = ivb_load_luts;
-               else
+               else {
                        dev_priv->display.load_luts = ilk_load_luts;
+                       dev_priv->display.read_luts = ilk_read_luts;
+               }
        }
 
        drm_crtc_enable_color_mgmt(&crtc->base,

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aac717fa4e25ff664d60dbca179269c7bb05be31..6ebb76a430e46a6ccdf3d546bfbf93f9d1a05faa 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7200,6 +7200,9 @@ enum {
 /* ilk/snb precision palette */
 #define _PREC_PALETTE_A           0x4b000
 #define _PREC_PALETTE_B           0x4c000
+#define   PREC_PALETTE_RED_MASK   REG_GENMASK(29, 20)
+#define   PREC_PALETTE_GREEN_MASK REG_GENMASK(19, 10)
+#define   PREC_PALETTE_BLUE_MASK  REG_GENMASK(9, 0)
 #define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A, _PREC_PALETTE_B) + (i) * 4)
 
 #define  _PREC_PIPEAGCMAX              0x4d000