staging:mt29f_spinand: MT29F2G failing as only 16 bits used for addressing.

For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
are necessary to address the correct page.

Signed-off-by: Palle Christensen <palle.christensen@microsemi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c b/drivers/staging/mt29f_spinand/mt29f_spinand.c
index 264ad362d858ddbcf5a737a14fdccf77cc6e6d2e..d20284b49557736debadb8f18562ecfe7cd1d1f6 100644 (file)
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
@@ -316,6 +316,7 @@ static int spinand_read_page_to_cache(struct spi_device *spi_nand, u16 page_id)
        row = page_id;
        cmd.cmd = CMD_READ;
        cmd.n_addr = 3;
+       cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
        cmd.addr[1] = (u8)((row & 0xff00) >> 8);
        cmd.addr[2] = (u8)(row & 0x00ff);
 
@@ -464,6 +465,7 @@ static int spinand_program_execute(struct spi_device *spi_nand, u16 page_id)
        row = page_id;
        cmd.cmd = CMD_PROG_PAGE_EXC;
        cmd.n_addr = 3;
+       cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
        cmd.addr[1] = (u8)((row & 0xff00) >> 8);
        cmd.addr[2] = (u8)(row & 0x00ff);
 
@@ -579,6 +581,7 @@ static int spinand_erase_block_erase(struct spi_device *spi_nand, u16 block_id)
        row = block_id;
        cmd.cmd = CMD_ERASE_BLK;
        cmd.n_addr = 3;
+       cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
        cmd.addr[1] = (u8)((row & 0xff00) >> 8);
        cmd.addr[2] = (u8)(row & 0x00ff);