]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: qcom: Add SDM845 SMEM nodes
authorSibi S <sibis@codeaurora.org>
Mon, 30 Apr 2018 14:44:28 +0000 (20:14 +0530)
committerAndy Gross <andy.gross@linaro.org>
Wed, 23 May 2018 04:28:59 +0000 (23:28 -0500)
Add all the necessary dt nodes to support SMEM driver
on SDM845. It also adds the required memory carveouts
so that the kernel does not access memory that is in
use.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arch/arm64/boot/dts/qcom/sdm845.dtsi

index 740c4182cbe1b3055c4b704005bdad4dbb5595d6..71e45c14abc111a1cf4ed73bae6f05beec62c15d 100644 (file)
@@ -21,6 +21,27 @@ memory@80000000 {
                reg = <0 0x80000000 0 0>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               memory@85fc0000 {
+                       reg = <0 0x85fc0000 0 0x20000>;
+                       no-map;
+               };
+
+               smem_mem: memory@86000000 {
+                       reg = <0x0 0x86000000 0x0 0x200000>;
+                       no-map;
+               };
+
+               memory@86200000 {
+                       reg = <0 0x86200000 0 0x2d00000>;
+                       no-map;
+               };
+       };
+
        cpus {
                #address-cells = <2>;
                #size-cells = <0>;
@@ -147,6 +168,18 @@ sleep_clk: sleep-clk {
                };
        };
 
+       tcsr_mutex: hwlock {
+               compatible = "qcom,tcsr-mutex";
+               syscon = <&tcsr_mutex_regs 0 0x1000>;
+               #hwlock-cells = <1>;
+       };
+
+       smem {
+               compatible = "qcom,smem";
+               memory-region = <&smem_mem>;
+               hwlocks = <&tcsr_mutex 3>;
+       };
+
        psci {
                compatible = "arm,psci-1.0";
                method = "smc";
@@ -273,6 +306,11 @@ spmi_bus: spmi@c440000 {
                        cell-index = <0>;
                };
 
+               tcsr_mutex_regs: syscon@1f40000 {
+                       compatible = "syscon";
+                       reg = <0x1f40000 0x40000>;
+               };
+
                apss_shared: mailbox@17990000 {
                        compatible = "qcom,sdm845-apss-shared";
                        reg = <0x17990000 0x1000>;