]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flag
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Wed, 10 Oct 2018 03:51:32 +0000 (12:51 +0900)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 15 Oct 2018 12:39:45 +0000 (14:39 +0200)
TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name.

All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually
have high registers. It is just that each of them implements its own
registers there. The original IP from Panasonic only defines registers
0x00-0xff in the bus_shift=1 review. The register area above them is
platform-dependent.

In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to
test the accessibility of CTL_SDIO_REGS. Because it is specific to
the TMIO MFD variant, the right thing to do is to move such registers
to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/tmio_mmc.c
drivers/mmc/host/tmio_mmc.h
include/linux/mfd/tmio.h

index 651e325238e6fc71c9d0c0d6336d94ac5dae02a6..93e83ad25976e756bdb04408b51c506925b02534 100644 (file)
 
 #include "tmio_mmc.h"
 
+/* Registers specific to this variant */
+#define CTL_SDIO_REGS          0x100
+#define CTL_CLK_AND_WAIT_CTL   0x138
+#define CTL_RESET_SDIO         0x1e0
+
 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
 {
        sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
@@ -153,8 +158,6 @@ static int tmio_mmc_probe(struct platform_device *pdev)
                goto cell_disable;
        }
 
-       pdata->flags |= TMIO_MMC_HAVE_HIGH_REG;
-
        host = tmio_mmc_host_alloc(pdev, pdata);
        if (IS_ERR(host)) {
                ret = PTR_ERR(host);
index 1a23a3d14bd6d88070e6575089bd33d9e0ab20b4..a8ad67eea340ee080a480cc87f2b350d4e3ade90 100644 (file)
@@ -43,9 +43,6 @@
 #define CTL_RESET_SD 0xe0
 #define CTL_VERSION 0xe2
 #define CTL_SDIF_MODE 0xe6
-#define CTL_SDIO_REGS 0x100
-#define CTL_CLK_AND_WAIT_CTL 0x138
-#define CTL_RESET_SDIO 0x1e0
 
 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
 #define TMIO_STOP_STP          BIT(0)
index 77866214ab51b31582559c384df8e6ffaaadc7b5..1e70060c92ce0a1137fc2877d75576910e8eb142 100644 (file)
  */
 #define TMIO_MMC_USE_GPIO_CD           BIT(5)
 
-/*
- * Some controllers doesn't have over 0x100 register.
- * it is used to checking accessibility of
- * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL
- */
-#define TMIO_MMC_HAVE_HIGH_REG         BIT(6)
-
 /*
  * Some controllers have CMD12 automatically
  * issue/non-issue register