]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915: Always pin contexts into the high GGTT
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 10 Feb 2017 10:14:22 +0000 (10:14 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 10 Feb 2017 13:58:40 +0000 (13:58 +0000)
Now that we have fast top-down insertion into the drm_mm, we can use it
for frequent runtime operations like insertion of the context object,
whereas before we limited it to the one-off insertion of the pinned
kernel context. Keeping the active context objects out of the mappable
region of the global GTT (except under memory pressure) improves our
ability to allocate mappable aperture region without triggering a GPU
stall.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170210101422.1598-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_ringbuffer.c

index b21dbd44045e644acbe3e45a7848253f97ac2a2e..697776d427b94b2e629241ab5c0eff551e83702e 100644 (file)
@@ -773,11 +773,9 @@ static int execlists_context_pin(struct intel_engine_cs *engine,
        }
        GEM_BUG_ON(!ce->state);
 
-       flags = PIN_GLOBAL;
+       flags = PIN_GLOBAL | PIN_HIGH;
        if (ctx->ggtt_offset_bias)
                flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias;
-       if (i915_gem_context_is_kernel(ctx))
-               flags |= PIN_HIGH;
 
        ret = i915_vma_pin(ce->state, 0, GEN8_LR_CONTEXT_ALIGN, flags);
        if (ret)
index d3d1e64f24980bad689a63a35a4c125ed04f3847..8ae78b79178f338a44e717d0eed7213c9db9978a 100644 (file)
@@ -2004,7 +2004,7 @@ intel_ring_free(struct intel_ring *ring)
        kfree(ring);
 }
 
-static int context_pin(struct i915_gem_context *ctx, unsigned int flags)
+static int context_pin(struct i915_gem_context *ctx)
 {
        struct i915_vma *vma = ctx->engine[RCS].state;
        int ret;
@@ -2019,7 +2019,7 @@ static int context_pin(struct i915_gem_context *ctx, unsigned int flags)
                        return ret;
        }
 
-       return i915_vma_pin(vma, 0, ctx->ggtt_alignment, PIN_GLOBAL | flags);
+       return i915_vma_pin(vma, 0, ctx->ggtt_alignment, PIN_GLOBAL | PIN_HIGH);
 }
 
 static int intel_ring_context_pin(struct intel_engine_cs *engine,
@@ -2034,13 +2034,7 @@ static int intel_ring_context_pin(struct intel_engine_cs *engine,
                return 0;
 
        if (ce->state) {
-               unsigned int flags;
-
-               flags = 0;
-               if (i915_gem_context_is_kernel(ctx))
-                       flags = PIN_HIGH;
-
-               ret = context_pin(ctx, flags);
+               ret = context_pin(ctx);
                if (ret)
                        goto error;
        }