]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: juno: fix few unit address format warnings
authorSudeep Holla <sudeep.holla@arm.com>
Wed, 12 Apr 2017 17:26:21 +0000 (18:26 +0100)
committerSudeep Holla <sudeep.holla@arm.com>
Wed, 19 Apr 2017 11:16:31 +0000 (12:16 +0100)
This patch fixes the following set of warnings on juno.

 smb@08000000 unit name should not have leading 0s
 sysctl@020000 simple-bus unit address format error, expected "20000"
 apbregs@010000 simple-bus unit address format error, expected "10000"
 mmci@050000 simple-bus unit address format error, expected "50000"
 kmi@060000 simple-bus unit address format error, expected "60000"
 kmi@070000 simple-bus unit address format error, expected "70000"
 wdt@0f0000 simple-bus unit address format error, expected "f0000"

Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
arch/arm64/boot/dts/arm/juno-base.dtsi
arch/arm64/boot/dts/arm/juno-motherboard.dtsi

index 8ffaff2043d02c70cecbc244f1f378f6bffd3035..bfe7d683a42e1b27b6e90997f9ebf18abb79afce 100644 (file)
@@ -699,7 +699,7 @@ memory@80000000 {
                      <0x00000008 0x80000000 0x1 0x80000000>;
        };
 
-       smb@08000000 {
+       smb@8000000 {
                compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <1>;
index 098601657f82394846f02031b4c6e95395624d24..2ac43221ddb680acafd1507a866da58514a53370 100644 (file)
@@ -137,7 +137,7 @@ iofpga@3,00000000 {
                                #size-cells = <1>;
                                ranges = <0 3 0 0x200000>;
 
-                               v2m_sysctl: sysctl@020000 {
+                               v2m_sysctl: sysctl@20000 {
                                        compatible = "arm,sp810", "arm,primecell";
                                        reg = <0x020000 0x1000>;
                                        clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
@@ -148,7 +148,7 @@ v2m_sysctl: sysctl@020000 {
                                        assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
                                };
 
-                               apbregs@010000 {
+                               apbregs@10000 {
                                        compatible = "syscon", "simple-mfd";
                                        reg = <0x010000 0x1000>;
 
@@ -216,7 +216,7 @@ led7 {
                                        };
                                };
 
-                               mmci@050000 {
+                               mmci@50000 {
                                        compatible = "arm,pl180", "arm,primecell";
                                        reg = <0x050000 0x1000>;
                                        interrupts = <5>;
@@ -228,7 +228,7 @@ mmci@050000 {
                                        clock-names = "mclk", "apb_pclk";
                                };
 
-                               kmi@060000 {
+                               kmi@60000 {
                                        compatible = "arm,pl050", "arm,primecell";
                                        reg = <0x060000 0x1000>;
                                        interrupts = <8>;
@@ -236,7 +236,7 @@ kmi@060000 {
                                        clock-names = "KMIREFCLK", "apb_pclk";
                                };
 
-                               kmi@070000 {
+                               kmi@70000 {
                                        compatible = "arm,pl050", "arm,primecell";
                                        reg = <0x070000 0x1000>;
                                        interrupts = <8>;
@@ -244,7 +244,7 @@ kmi@070000 {
                                        clock-names = "KMIREFCLK", "apb_pclk";
                                };
 
-                               wdt@0f0000 {
+                               wdt@f0000 {
                                        compatible = "arm,sp805", "arm,primecell";
                                        reg = <0x0f0000 0x10000>;
                                        interrupts = <7>;