]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm: zynq: Add support for Xilinx zc770 xm013 dc4 board
authorMichal Simek <michal.simek@xilinx.com>
Wed, 17 Jan 2018 14:15:42 +0000 (15:15 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 8 Mar 2018 07:11:14 +0000 (08:11 +0100)
zc770 is based board which is extended by FMC/DC cards for SoC
validation. FMCs/DCs are supposed to cover all SoC configurations.
FMC/DC contains can, ethernet, i2c, qspi, spi and uart.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/arm/xilinx.txt
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/zynq-zc770-xm013.dts [new file with mode: 0644]

index d1ce0d5c7281b2267faf6306e5ed1b5c5a1243d6..06e07952d5091580c1dd660f40671979935b605d 100644 (file)
@@ -15,6 +15,7 @@ Additional compatible strings:
   "xlnx,zynq-zc770-xm010"
   "xlnx,zynq-zc770-xm011"
   "xlnx,zynq-zc770-xm012"
+  "xlnx,zynq-zc770-xm013"
 
 ---------------------------------------------------------------
 
index 2c74b935ad1c0c990d24eb06cca3e2052aa2d370..d5de3748a80adc92883aa81509e821ad9f8b9e37 100644 (file)
@@ -1070,6 +1070,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
        zynq-zc770-xm010.dtb \
        zynq-zc770-xm011.dtb \
        zynq-zc770-xm012.dtb \
+       zynq-zc770-xm013.dtb \
        zynq-zed.dtb \
        zynq-zybo.dtb
 dtb-$(CONFIG_MACH_ARMADA_370) += \
diff --git a/arch/arm/boot/dts/zynq-zc770-xm013.dts b/arch/arm/boot/dts/zynq-zc770-xm013.dts
new file mode 100644 (file)
index 0000000..8bb6685
--- /dev/null
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZC770 XM013 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+       compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
+       model = "Xilinx Zynq";
+
+       aliases {
+               ethernet0 = &gem1;
+               i2c0 = &i2c1;
+               serial0 = &uart0;
+               spi1 = &spi0;
+       };
+
+       chosen {
+               bootargs = "";
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x40000000>;
+       };
+};
+
+&can1 {
+       status = "okay";
+};
+
+&gem1 {
+       status = "okay";
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy>;
+
+       ethernet_phy: ethernet-phy@7 {
+               reg = <7>;
+               device_type = "ethernet-phy";
+       };
+};
+
+&i2c1 {
+       status = "okay";
+       clock-frequency = <400000>;
+
+       si570: clock-generator@55 {
+               #clock-cells = <0>;
+               compatible = "silabs,si570";
+               temperature-stability = <50>;
+               reg = <0x55>;
+               factory-fout = <156250000>;
+               clock-frequency = <148500000>;
+       };
+};
+
+&spi0 {
+       status = "okay";
+       num-cs = <4>;
+       is-decoded-cs = <0>;
+       eeprom: eeprom@0 {
+               at25,byte-len = <8192>;
+               at25,addr-mode = <2>;
+               at25,page-size = <32>;
+
+               compatible = "atmel,at25";
+               reg = <2>;
+               spi-max-frequency = <1000000>;
+       };
+};
+
+&uart0 {
+       status = "okay";
+};