spi: bcm2835aux: fix corruptions for longer spi transfers

On long running tests with a mcp2517fd can controller it showed that
on rare occations the data read shows corruptions for longer spi transfers.

Example of a 22 byte transfer:

expected (as captured on logic analyzer):
FF FF 78 00 00 00 08 06 00 00 91 20 77 56 84 85 86 87 88 89 8a 8b

read by the driver:
FF FF 78 00 00 00 08 06 00 00 91 20 77 56 84 88 89 8a 00 00 8b 9b

To fix this use BCM2835_AUX_SPI_STAT_RX_LVL to determine when we may
read data from the fifo reliably without any corruption.

Surprisingly the only values ever empirically read in
BCM2835_AUX_SPI_STAT_RX_LVL are 0x00, 0x10, 0x20 and 0x30.
So whenever the mask is not 0 we can read from the fifo in a safe manner.

The patch has now been tested intensively and we are no longer
able to reproduce the "RX" issue any longer.

Fixes: 1ea29b39f4c812ec ("spi: bcm2835aux: add bcm2835 auxiliary spi device...")
Reported-by: Hubert Denkmair <h.denkmair@intence.de>
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c
index 0838dbda57c78d28442734030a24e95803ee8f26..d9e62f717a454a47980877ddb65dce8174d27113 100644 (file)
--- a/drivers/spi/spi-bcm2835aux.c
+++ b/drivers/spi/spi-bcm2835aux.c
@@ -180,12 +180,12 @@ static void bcm2835aux_spi_reset_hw(struct bcm2835aux_spi *bs)
 
 static void bcm2835aux_spi_transfer_helper(struct bcm2835aux_spi *bs)
 {
+       u32 stat = bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT);
+
        /* check if we have data to read */
-       while (bs->rx_len &&
-              (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
-                 BCM2835_AUX_SPI_STAT_RX_EMPTY))) {
+       for (; bs->rx_len && (stat & BCM2835_AUX_SPI_STAT_RX_LVL);
+            stat = bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT))
                bcm2835aux_rd_fifo(bs);
-       }
 
        /* check if we have data to write */
        while (bs->tx_len &&