ARCv2: Add explcit unaligned access support (and ability to disable too)

As of today we enable unaligned access unconditionally on ARCv2.
Do this under a Kconfig option to allow disable it for test, benchmarking
etc. Also while at it

  - Select HAVE_EFFICIENT_UNALIGNED_ACCESS
  - Although gcc defaults to unaligned access (since GNU 2018.03), add the
    right toggles for enabling or disabling as appropriate
  - update bootlog to prints both HW feature status (exists, enabled/disabled)
    and SW status (used / not used).
  - wire up the relaxed memcpy for unaligned access

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
[vgupta: squashed patches, handle gcc -mno-unaligned-access quick]

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index d750b302d5ab7c1729ce4967bc0bcc4578564eb7..95fb11a85566eb128acd3437d7c4e60b8cc07170 100644 (file)
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -386,6 +386,15 @@ config ARC_HAS_SWAPE
 
 if ISA_ARCV2
 
+config ARC_USE_UNALIGNED_MEM_ACCESS
+       bool "Enable unaligned access in HW"
+       default y
+       select HAVE_EFFICIENT_UNALIGNED_ACCESS
+       help
+         The ARC HS architecture supports unaligned memory access
+         which is disabled by default. Enable unaligned access in
+         hardware and use software to use it
+
 config ARC_HAS_LL64
        bool "Insn: 64bit LDD/STD"
        help

diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index df00578c279d4bc0ee03d71089769383440e7cf6..e2b991f75bc5b7bc0d8103d65e938df9b9c038ac 100644 (file)
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -28,6 +28,12 @@ cflags-$(CONFIG_ARC_HAS_SWAPE)               += -mswape
 
 ifdef CONFIG_ISA_ARCV2
 
+ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
+cflags-y                               += -munaligned-access
+else
+cflags-y                               += -mno-unaligned-access
+endif
+
 ifndef CONFIG_ARC_HAS_LL64
 cflags-y                               += -mno-ll64
 endif

diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index a27eafdc82602f6856b00c5fbd82db72c33cf238..0c13317af1d612cbcf5152214c3c826229805682 100644 (file)
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -82,6 +82,7 @@
 #define ECR_V_DTLB_MISS                        0x05
 #define ECR_V_PROTV                    0x06
 #define ECR_V_TRAP                     0x09
+#define ECR_V_MISALIGN                 0x0d
 #endif
 
 /* DTLB Miss and Protection Violation Cause Codes */

diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h
index 8a4f77ea3238e6f017ae24ab6b55e2952637fe04..e66d0339e1d8617ac30050f53d26d926243266e6 100644 (file)
--- a/arch/arc/include/asm/irqflags-arcv2.h
+++ b/arch/arc/include/asm/irqflags-arcv2.h
@@ -44,7 +44,13 @@
 #define ARCV2_IRQ_DEF_PRIO     1
 
 /* seed value for status register */
-#define ISA_INIT_STATUS_BITS   (STATUS_IE_MASK | STATUS_AD_MASK | \
+#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
+#define __AD_ENB       STATUS_AD_MASK
+#else
+#define __AD_ENB       0
+#endif
+
+#define ISA_INIT_STATUS_BITS   (STATUS_IE_MASK | __AD_ENB | \
                                        (ARCV2_IRQ_DEF_PRIO << 1))
 
 #ifndef __ASSEMBLY__

diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 30e090625916160acb23df6bfa44e86bcad7192f..36774348d23b77dea3398d487a703d569a7d8317 100644 (file)
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -54,7 +54,12 @@
        ; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
        ; by default
        lr      r5, [status32]
+#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
        bset    r5, r5, STATUS_AD_BIT
+#else
+       ; Although disabled at reset, bootloader might have enabled it
+       bclr    r5, r5, STATUS_AD_BIT
+#endif
        kflag   r5
 #endif
 .endm

diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c
index cf18b3e5a934d34c684edcc7aa84533a10f932bf..c0d0124de089b4a456a98c20c5ab6f78913ab36d 100644 (file)
--- a/arch/arc/kernel/intc-arcv2.c
+++ b/arch/arc/kernel/intc-arcv2.c
@@ -95,7 +95,7 @@ void arc_init_IRQ(void)
 
        /* setup status32, don't enable intr yet as kernel doesn't want */
        tmp = read_aux_reg(ARC_REG_STATUS32);
-       tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
+       tmp |= ARCV2_IRQ_DEF_PRIO << 1;
        tmp &= ~STATUS_IE_MASK;
        asm volatile("kflag %0  \n"::"r"(tmp));
 }

diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 7b2340996cf80fc4ddc382c55d86acbe37d49bf5..2266e4ee41429027efd0f3467d2c97737844853b 100644 (file)
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -263,7 +263,7 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 {
        struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
        struct bcr_identity *core = &cpu->core;
-       int i, n = 0, ua = 0;
+       int n = 0;
 
        FIX_PTR(cpu);
 
@@ -283,16 +283,23 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
                       IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
                       IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
 
-#ifdef __ARC_UNALIGNED__
-       ua = 1;
+       n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
+                      IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
+                      IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
+                      IS_AVAIL2(cpu->isa.unalign, "unalign ", CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS));
+
+#if defined(__ARC_UNALIGNED__) && !defined(CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS)
+       /*
+        * gcc 7.3.1 (GNU 2018.03) onwards generate unaligned access by default
+        * but -mno-unaligned-access to disable that didn't work until gcc 8.2.1
+        * (GNU 2019.03). So landing here implies the interim period, when
+        * despite Kconfig being off, gcc is generating unaligned accesses which
+        * could bomb later on. So better to disallow such broken builds
+        */
+       BUILD_BUG_ON_MSG(1, "gcc doesn't support -mno-unaligned-access");
 #endif
-       n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
-                          IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
-                          IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
-                          IS_AVAIL1(cpu->isa.unalign, "unalign "), IS_USED_RUN(ua));
 
-       if (i)
-               n += scnprintf(buf + n, len - n, "\n\t\t: ");
+       n += scnprintf(buf + n, len - n, "\n\t\t: ");
 
        if (cpu->extn_mpy.ver) {
                if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */

diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/kernel/troubleshoot.c
index 215f515442e03d53ee3a18ade4c62e2a06987b3b..b0aa8c02833137c42a95d2c48a187f45fc1fc479 100644 (file)
--- a/arch/arc/kernel/troubleshoot.c
+++ b/arch/arc/kernel/troubleshoot.c
@@ -145,7 +145,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
        } else if (vec == ECR_V_PROTV) {
                if (cause_code == ECR_C_PROTV_INST_FETCH)
                        pr_cont("Execute from Non-exec Page\n");
-               else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
+               else if (cause_code == ECR_C_PROTV_MISALIG_DATA &&
+                        IS_ENABLED(CONFIG_ISA_ARCOMPACT))
                        pr_cont("Misaligned r/w from 0x%08lx\n", address);
                else
                        pr_cont("%s access not allowed on page\n",
@@ -161,6 +162,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
                        pr_cont("Bus Error from Data Mem\n");
                else
                        pr_cont("Bus Error, check PRM\n");
+       } else if (vec == ECR_V_MISALIGN) {
+               pr_cont("Misaligned r/w from 0x%08lx\n", address);
 #endif
        } else if (vec == ECR_V_TRAP) {
                if (regs->ecr_param == 5)

diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile
index b1656d15609750910512c9e00799c8d736f665b2..f7537b466b23dea34ca3e5772239f96f206a9124 100644 (file)
--- a/arch/arc/lib/Makefile
+++ b/arch/arc/lib/Makefile
@@ -8,4 +8,10 @@
 lib-y  := strchr-700.o strcpy-700.o strlen.o memcmp.o
 
 lib-$(CONFIG_ISA_ARCOMPACT)    += memcpy-700.o memset.o strcmp.o
-lib-$(CONFIG_ISA_ARCV2)                += memcpy-archs.o memset-archs.o strcmp-archs.o
+lib-$(CONFIG_ISA_ARCV2)                += memset-archs.o strcmp-archs.o
+
+ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
+lib-$(CONFIG_ISA_ARCV2)                +=memcpy-archs-unaligned.o
+else
+lib-$(CONFIG_ISA_ARCV2)                +=memcpy-archs.o
+endif