ARM: dts: iwg20d-q7: Add support for ttySC3

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
index efd8af9242d12fcfc909d33bd99e8729acf2cfee..c865499ad2a19ac9a584c16f27b2461871dc3a51 100644 (file)
--- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi
+++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi
@@ -11,6 +11,7 @@
 / {
        aliases {
                serial0 = &scif0;
+               serial3 = &scifb1;
                ethernet0 = &avb;
        };
 
@@ -104,6 +105,11 @@ scif0_pins: scif0 {
                function = "scif0";
        };
 
+       scifb1_pins: scifb1 {
+               groups = "scifb1_data_d", "scifb1_ctrl";
+               function = "scifb1";
+       };
+
        sdhi1_pins: sd1 {
                groups = "sdhi1_data4", "sdhi1_ctrl";
                function = "sdhi1";
@@ -134,6 +140,14 @@ &scif0 {
        status = "okay";
 };
 
+&scifb1 {
+       pinctrl-0 = <&scifb1_pins>;
+       pinctrl-names = "default";
+
+       uart-has-rtscts;
+       status = "okay";
+};
+
 &sdhi1 {
        pinctrl-0 = <&sdhi1_pins>;
        pinctrl-1 = <&sdhi1_pins_uhs>;