]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: allwinner: a64: add AXP803 PMIC support to SoPine and the baseboard
authorIcenowy Zheng <icenowy@aosc.io>
Sat, 22 Jul 2017 02:18:43 +0000 (10:18 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 24 Jul 2017 07:56:00 +0000 (09:56 +0200)
The SoPine SoM has an AXP803 PMIC connected to the RSB bus of the A64
SoC, and the regulators of the PMIC are used both on the SoM itself and
on the official baseboard

Add related device tree parts to the SoPine SoM DTSI file and the
baseboard DT.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi

index 17eb1cc5bf6b4061a8ea8cf40e54b4eb52c1ebe3..834a5d249bb24ab5ee3591ba5614d292c8e21da9 100644 (file)
@@ -81,6 +81,7 @@ &emac {
        pinctrl-0 = <&rgmii_pins>;
        phy-mode = "rgmii";
        phy-handle = <&ext_rgmii_phy>;
+       phy-supply = <&reg_dc1sw>;
        status = "okay";
 };
 
@@ -110,6 +111,28 @@ &ohci1 {
        status = "okay";
 };
 
+&reg_dc1sw {
+       regulator-name = "vcc-phy";
+};
+
+&reg_dldo1 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-hdmi";
+};
+
+&reg_dldo2 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-mipi";
+};
+
+&reg_dldo4 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pins_a>;
index 475518b031dd811269c2e1c1616056f877197af8..a5da18a6f2866d34537c55dcc5d3288daf6c8331 100644 (file)
@@ -63,3 +63,89 @@ &mmc0 {
        bus-width = <4>;
        status = "okay";
 };
+
+&r_rsb {
+       status = "okay";
+
+       axp803: pmic@3a3 {
+               compatible = "x-powers,axp803";
+               reg = <0x3a3>;
+               interrupt-parent = <&r_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
+#include "axp803.dtsi"
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1040000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_eldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vdd-1v8-lpddr";
+};
+
+&reg_fldo1 {
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+&reg_fldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+       regulator-name = "vcc-rtc";
+};