drm/amdgpu: Adjust TMR address alignment as per HW requirement

According to HW engineer, they prefer the TMR address be "naturally aligned", e.g. the start address
must be an integer divide of TME size.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 2206bb4b0903ca0161b6530548cd460e318e9093..905cce1814f3fffb1f3a741f5e9731e75edab12c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -187,13 +187,13 @@ static int psp_tmr_init(struct psp_context *psp)
        int ret;
 
        /*
-        * Allocate 3M memory aligned to 1M from Frame Buffer (local
-        * physical).
+        * According to HW engineer, they prefer the TMR address be "naturally
+        * aligned" , e.g. the start address be an integer divide of TMR size.
         *
         * Note: this memory need be reserved till the driver
         * uninitializes.
         */
-       ret = amdgpu_bo_create_kernel(psp->adev, PSP_TMR_SIZE, 0x100000,
+       ret = amdgpu_bo_create_kernel(psp->adev, PSP_TMR_SIZE, PSP_TMR_SIZE,
                                      AMDGPU_GEM_DOMAIN_VRAM,
                                      &psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);