]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: marvell: armada-37xx: add second UART port
authorMiquel Raynal <miquel.raynal@free-electrons.com>
Fri, 13 Oct 2017 09:01:58 +0000 (11:01 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Mon, 30 Oct 2017 14:56:22 +0000 (15:56 +0100)
Add a node in Armada 37xx DTSI file for the second UART, with a
different compatible due to its extended IP which has some
differences with the first UART already in place.

Make use of this commit to also fully describe the first port and
use the same clear and named interrupt bindings for both ports.

The standard UART (UART0) uses level-interrupts while the extended
UART (UART1) uses edge-triggered interrupts.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm64/boot/dts/marvell/armada-37xx.dtsi

index cddeb00a6e6d7d499d2d488113f460afdd73695b..90c26d616a5418f54243906bb851dc89883cea9f 100644 (file)
@@ -55,6 +55,7 @@ / {
 
        aliases {
                serial0 = &uart0;
+               serial1 = &uart1;
        };
 
        cpus {
@@ -136,7 +137,22 @@ uart0: serial@12000 {
                                compatible = "marvell,armada-3700-uart";
                                reg = <0x12000 0x200>;
                                clocks = <&xtalclk>;
-                               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts =
+                               <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "uart-sum", "uart-tx", "uart-rx";
+                               status = "disabled";
+                       };
+
+                       uart1: serial@12200 {
+                               compatible = "marvell,armada-3700-uart-ext";
+                               reg = <0x12200 0x30>;
+                               clocks = <&xtalclk>;
+                               interrupts =
+                               <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
+                               <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+                               interrupt-names = "uart-tx", "uart-rx";
                                status = "disabled";
                        };