clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offset

Datasheet specified that parent MUX settings are at bits [10:8],
but current implementation specifies incorrect offset at [10:12].
Fix this.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
index e43acebdfbcdbe98d67009e4a98ae0619181018a..c7b51f030eb26f68bf065ba9855af66d6d835b4f 100644 (file)
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
@@ -506,7 +506,7 @@ static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(csi_mclk_clk, "csi-mclk",
                                       csi_mclk_parents, csi_mclk_table,
                                       0x134,
                                       0, 5,    /* M */
-                                      10, 3,   /* mux */
+                                      8, 3,    /* mux */
                                       BIT(15), /* gate */
                                       0);