PCI/portdrv: Add #defines for AER and DPC Interrupt Message Number masks

In the AER case, the mask isn't strictly necessary because there are no
higher-order bits above the Interrupt Message Number, but using a #define
will make it possible to grep for it.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>

diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 313a21df1692fa62f2330e55121aa0788e48ce29..72fcbe5567dde0905896a8d093121b1112f51fd2 100644 (file)
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -114,7 +114,7 @@ static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask)
                 */
                pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
                pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
-               entry = reg32 >> 27;
+               entry = (reg32 & PCI_ERR_ROOT_AER_IRQ) >> 27;
                if (entry >= nr_entries)
                        goto out_free_irqs;
 
@@ -141,7 +141,7 @@ static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask)
                 */
                pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC);
                pci_read_config_word(dev, pos + PCI_EXP_DPC_CAP, &reg16);
-               entry = reg16 & 0x1f;
+               entry = reg16 & PCI_EXP_DPC_IRQ;
                if (entry >= nr_entries)
                        goto out_free_irqs;
 

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index f8d58045926ff11d23cd8e575e550badd78e3237..f7c09a4c494a3efc9cd7fec15fc82014b5cc2d2d 100644 (file)
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -746,6 +746,7 @@
 #define PCI_ERR_ROOT_FIRST_FATAL       0x00000010 /* First UNC is Fatal */
 #define PCI_ERR_ROOT_NONFATAL_RCV      0x00000020 /* Non-Fatal Received */
 #define PCI_ERR_ROOT_FATAL_RCV         0x00000040 /* Fatal Received */
+#define PCI_ERR_ROOT_AER_IRQ           0xf8000000 /* Advanced Error Interrupt Message Number */
 #define PCI_ERR_ROOT_ERR_SRC   52      /* Error Source Identification */
 
 /* Virtual Channel */
@@ -960,6 +961,7 @@
 
 /* Downstream Port Containment */
 #define PCI_EXP_DPC_CAP                        4       /* DPC Capability */
+#define PCI_EXP_DPC_IRQ                        0x1f    /* DPC Interrupt Message Number */
 #define  PCI_EXP_DPC_CAP_RP_EXT                0x20    /* Root Port Extensions for DPC */
 #define  PCI_EXP_DPC_CAP_POISONED_TLP  0x40    /* Poisoned TLP Egress Blocking Supported */
 #define  PCI_EXP_DPC_CAP_SW_TRIGGER    0x80    /* Software Triggering Supported */