drm/amd/display: dal1.1 xfm prog update

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.c
index 398af229f2a74b49c90e1e3c00102ada361ce164..59ba2d250d6d3b387215a728d269315f68bf70ab 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.c
@@ -212,7 +212,7 @@ static int get_pixel_depth_val(enum lb_pixel_depth depth)
        }
 }
 
-static void transform_set_lb(
+static void xfmn10_set_lb(
        struct dcn10_transform *xfm,
        const struct line_buffer_params *lb_params,
        enum lb_memory_config mem_size_config)
@@ -622,7 +622,7 @@ void transform_set_scaler_auto_scale(
                return;
 
        lb_config =  find_lb_memory_config(scl_data);
-       transform_set_lb(xfm, &scl_data->lb_params, lb_config);
+       xfmn10_set_lb(xfm, &scl_data->lb_params, lb_config);
 
        if (dscl_mode == DSCL_MODE_SCALING_444_BYPASS)
                return;
@@ -738,7 +738,7 @@ static void transform_set_manual_ratio_init(
 }
 
 /* Main function to program scaler and line buffer in manual scaling mode */
-static void transform_set_scaler_manual_scale(
+static void xfmn10_set_scaler_manual_scale(
        struct transform *xfm_base,
        const struct scaler_data *scl_data)
 {
@@ -769,7 +769,7 @@ static void transform_set_scaler_manual_scale(
                return;
        /* LB */
        lb_config =  find_lb_memory_config(scl_data);
-       transform_set_lb(xfm, &scl_data->lb_params, lb_config);
+       xfmn10_set_lb(xfm, &scl_data->lb_params, lb_config);
 
        if (dscl_mode == DSCL_MODE_SCALING_444_BYPASS)
                return;
@@ -1027,7 +1027,7 @@ static void dcn_transform_set_gamut_remap(
 static struct transform_funcs dcn10_transform_funcs = {
 
        .transform_reset = transform_reset,
-       .transform_set_scaler = transform_set_scaler_manual_scale,
+       .transform_set_scaler = xfmn10_set_scaler_manual_scale,
        .transform_get_optimal_number_of_taps = transform_get_optimal_number_of_taps,
        .transform_set_gamut_remap = dcn_transform_set_gamut_remap,
 };

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.h
index 880a554886b8e857632b4daf86f53993f7a9e361..8df74cc153f547ebd71b33e04a2c0ad2df60589c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_transform.h
@@ -38,6 +38,13 @@
        .field_name = reg_name ## __ ## field_name ## post_fix
 
 #define TF_REG_LIST_DCN(id) \
+       SRI(CM_GAMUT_REMAP_CONTROL, CM, id),\
+       SRI(CM_GAMUT_REMAP_C11_C12, CM, id),\
+       SRI(CM_GAMUT_REMAP_C13_C14, CM, id),\
+       SRI(CM_GAMUT_REMAP_C21_C22, CM, id),\
+       SRI(CM_GAMUT_REMAP_C23_C24, CM, id),\
+       SRI(CM_GAMUT_REMAP_C31_C32, CM, id),\
+       SRI(CM_GAMUT_REMAP_C33_C34, CM, id),\
        SRI(DSCL_EXT_OVERSCAN_LEFT_RIGHT, DSCL, id), \
        SRI(DSCL_EXT_OVERSCAN_TOP_BOTTOM, DSCL, id), \
        SRI(OTG_H_BLANK, DSCL, id), \
@@ -74,13 +81,6 @@
 
 #define TF_REG_LIST_DCN10(id) \
        TF_REG_LIST_DCN(id), \
-       SRI(CM_GAMUT_REMAP_CONTROL, CM, id),\
-       SRI(CM_GAMUT_REMAP_C11_C12, CM, id),\
-       SRI(CM_GAMUT_REMAP_C13_C14, CM, id),\
-       SRI(CM_GAMUT_REMAP_C21_C22, CM, id),\
-       SRI(CM_GAMUT_REMAP_C23_C24, CM, id),\
-       SRI(CM_GAMUT_REMAP_C31_C32, CM, id),\
-       SRI(CM_GAMUT_REMAP_C33_C34, CM, id),\
        SRI(CM_COMA_C11_C12, CM, id),\
        SRI(CM_COMA_C13_C14, CM, id),\
        SRI(CM_COMA_C21_C22, CM, id),\
@@ -95,6 +95,19 @@
        SRI(CM_COMB_C33_C34, CM, id)
 
 #define TF_REG_LIST_SH_MASK_DCN(mask_sh)\
+       TF_SF(CM0_CM_GAMUT_REMAP_CONTROL, CM_GAMUT_REMAP_MODE, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C11_C12, CM_GAMUT_REMAP_C11, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C11_C12, CM_GAMUT_REMAP_C12, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C13_C14, CM_GAMUT_REMAP_C13, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C13_C14, CM_GAMUT_REMAP_C14, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C21_C22, CM_GAMUT_REMAP_C21, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C21_C22, CM_GAMUT_REMAP_C22, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C23_C24, CM_GAMUT_REMAP_C23, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C23_C24, CM_GAMUT_REMAP_C24, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C31_C32, CM_GAMUT_REMAP_C31, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C31_C32, CM_GAMUT_REMAP_C32, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C33_C34, CM_GAMUT_REMAP_C33, mask_sh),\
+       TF_SF(CM0_CM_GAMUT_REMAP_C33_C34, CM_GAMUT_REMAP_C34, mask_sh),\
        TF_SF(DSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_LEFT, mask_sh),\
        TF_SF(DSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_RIGHT, mask_sh),\
        TF_SF(DSCL0_DSCL_EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_BOTTOM, mask_sh),\
@@ -176,19 +189,6 @@
        TF_SF(DSCL0_LB_DATA_FORMAT, PIXEL_REDUCE_MODE, mask_sh),\
        TF_SF(DSCL0_LB_DATA_FORMAT, DYNAMIC_PIXEL_DEPTH, mask_sh),\
        TF_SF(DSCL0_LB_DATA_FORMAT, DITHER_EN, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_CONTROL, CM_GAMUT_REMAP_MODE, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C11_C12, CM_GAMUT_REMAP_C11, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C11_C12, CM_GAMUT_REMAP_C12, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C13_C14, CM_GAMUT_REMAP_C13, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C13_C14, CM_GAMUT_REMAP_C14, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C21_C22, CM_GAMUT_REMAP_C21, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C21_C22, CM_GAMUT_REMAP_C22, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C23_C24, CM_GAMUT_REMAP_C23, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C23_C24, CM_GAMUT_REMAP_C24, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C31_C32, CM_GAMUT_REMAP_C31, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C31_C32, CM_GAMUT_REMAP_C32, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C33_C34, CM_GAMUT_REMAP_C33, mask_sh),\
-       TF_SF(CM0_CM_GAMUT_REMAP_C33_C34, CM_GAMUT_REMAP_C34, mask_sh),\
        TF_SF(CM0_CM_COMA_C11_C12, CM_COMA_C11, mask_sh),\
        TF_SF(CM0_CM_COMA_C11_C12, CM_COMA_C12, mask_sh),\
        TF_SF(CM0_CM_COMA_C13_C14, CM_COMA_C13, mask_sh),\
@@ -411,10 +411,11 @@ struct dcn10_transform {
        int lb_bits_per_entry;
 };
 
-bool dcn10_transform_construct(struct dcn10_transform *xfm110,
+bool dcn10_transform_construct(struct dcn10_transform *xfmn10,
        struct dc_context *ctx,
        uint32_t inst,
        const struct dcn_transform_registers *tf_regs,
        const struct dcn_transform_shift *tf_shift,
        const struct dcn_transform_mask *tf_mask);
+
 #endif