]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915/gvt: Correct the calculation of plane size
authorXiong Zhang <xiong.y.zhang@intel.com>
Mon, 25 Mar 2019 08:29:19 +0000 (16:29 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Thu, 4 Apr 2019 00:44:37 +0000 (08:44 +0800)
stride isn't in unit of pixel, it is bytes, so calculation of
plane size doesn't need to multiple bpp.

Fixes: e546e281d33d ("drm/i915/gvt: Dmabuf support for GVT-g")
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/dmabuf.c

index 3e7e2b80c8579017cecdda478bc6166e1f46e061..5d887f7cc0d5c91aebdcdb11e01569c86b891d27 100644 (file)
@@ -238,9 +238,6 @@ static int vgpu_get_plane_info(struct drm_device *dev,
                default:
                        gvt_vgpu_err("invalid tiling mode: %x\n", p.tiled);
                }
-
-               info->size = (((p.stride * p.height * p.bpp) / 8) +
-                             (PAGE_SIZE - 1)) >> PAGE_SHIFT;
        } else if (plane_id == DRM_PLANE_TYPE_CURSOR) {
                ret = intel_vgpu_decode_cursor_plane(vgpu, &c);
                if (ret)
@@ -262,14 +259,13 @@ static int vgpu_get_plane_info(struct drm_device *dev,
                        info->x_hot = UINT_MAX;
                        info->y_hot = UINT_MAX;
                }
-
-               info->size = (((info->stride * c.height * c.bpp) / 8)
-                               + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
        } else {
                gvt_vgpu_err("invalid plane id:%d\n", plane_id);
                return -EINVAL;
        }
 
+       info->size = (info->stride * info->height + PAGE_SIZE - 1)
+                     >> PAGE_SHIFT;
        if (info->size == 0) {
                gvt_vgpu_err("fb size is zero\n");
                return -EINVAL;