]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
dt-bindings: panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel
authorJagan Teki <jagan@amarulasolutions.com>
Tue, 12 Feb 2019 20:41:08 +0000 (02:11 +0530)
committerThierry Reding <treding@nvidia.com>
Wed, 3 Apr 2019 16:44:39 +0000 (18:44 +0200)
Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel.

Add dt-bingings for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190212204109.3528-1-jagan@amarulasolutions.com
Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
new file mode 100644 (file)
index 0000000..82caa7b
--- /dev/null
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+Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel
+
+Required properties:
+- compatible: must be "feiyang,fy07024di26a30d"
+- reg: DSI virtual channel used by that screen
+- avdd-supply: analog regulator dc1 switch
+- dvdd-supply: 3v3 digital regulator
+- reset-gpios: a GPIO phandle for the reset pin
+
+Optional properties:
+- backlight: phandle for the backlight control.
+
+panel@0 {
+       compatible = "feiyang,fy07024di26a30d";
+       reg = <0>;
+       avdd-supply = <&reg_dc1sw>;
+       dvdd-supply = <&reg_dldo2>;
+       reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
+       backlight = <&backlight>;
+};