arm64: dts: ls1028a: Add properties for Mali DP500 node

The LS1028A has a LCD controller and Displayport interface that
connects to eDP and Displayport connectors on the LS1028A board.

This patch enables the LCD controller driver on the LS1028A.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index b04581249f0bca701dfe8134ffc7f65a44a2fbd4..c0a13f9e5b95cac0ea9912c3e2b7ff7806b824db 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -70,6 +70,27 @@ sysclk: clock-sysclk {
                clock-output-names = "sysclk";
        };
 
+       dpclk: clock-dp {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <27000000>;
+               clock-output-names= "dpclk";
+       };
+
+       aclk: clock-axi {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <650000000>;
+               clock-output-names= "aclk";
+       };
+
+       pclk: clock-apb {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <650000000>;
+               clock-output-names= "pclk";
+       };
+
        reboot {
                compatible ="syscon-reboot";
                regmap = <&dcfg>;
@@ -433,4 +454,21 @@ enetc_port1: ethernet@0,1 {
                        };
                };
        };
+
+       malidp0: display@f080000 {
+               compatible = "arm,mali-dp500";
+               reg = <0x0 0xf080000 0x0 0x10000>;
+               interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 223 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "DE", "SE";
+               clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
+               clock-names = "pxlclk", "mclk", "aclk", "pclk";
+               arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+
+               port {
+                       dp0_out: endpoint {
+
+                       };
+               };
+       };
 };