arm64: dts: qcom: qcs404: Add RPM GLINK related nodes

Add RPM GLINK node and the RPM message ram, hwspinlock, APCS apps global
and smem nodes it depends on.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index d40f3923ed69a95388441ac3bb55d9bb886c8aac..6bc0925acda9b7b05d3082dec525b91e1c18d5d8 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -114,12 +114,45 @@ wlan_msa_mem: memory@8a000000 {
                };
        };
 
+       rpm-glink {
+               compatible = "qcom,glink-rpm";
+
+               interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+               qcom,rpm-msg-ram = <&rpm_msg_ram>;
+               mboxes = <&apcs_glb 0>;
+
+               rpm_requests: glink-channel {
+                       compatible = "qcom,rpm-qcs404";
+                       qcom,glink-channels = "rpm_requests";
+               };
+       };
+
+       smem {
+               compatible = "qcom,smem";
+
+               memory-region = <&smem_region>;
+               qcom,rpm-msg-ram = <&rpm_msg_ram>;
+
+               hwlocks = <&tcsr_mutex 3>;
+       };
+
+       tcsr_mutex: hwlock {
+               compatible = "qcom,tcsr-mutex";
+               syscon = <&tcsr_mutex_regs 0 0x1000>;
+               #hwlock-cells = <1>;
+       };
+
        soc: soc@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
                compatible = "simple-bus";
 
+               rpm_msg_ram: memory@60000 {
+                       compatible = "qcom,rpm-msg-ram";
+                       reg = <0x00060000 0x6000>;
+               };
+
                gcc: clock-controller@1800000 {
                        compatible = "qcom,gcc-qcs404";
                        reg = <0x01800000 0x80000>;
@@ -129,6 +162,11 @@ gcc: clock-controller@1800000 {
                        assigned-clock-rates = <19200000>;
                };
 
+               tcsr_mutex_regs: syscon@1905000 {
+                       compatible = "syscon";
+                       reg = <0x01905000 0x20000>;
+               };
+
                blsp1_uart2: serial@78b1000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0x078b1000 0x200>;
@@ -146,6 +184,12 @@ intc: interrupt-controller@b000000 {
                              <0x0b002000 0x1000>;
                };
 
+               apcs_glb: mailbox@b011000 {
+                       compatible = "qcom,qcs404-apcs-apps-global", "syscon";
+                       reg = <0x0b011000 0x1000>;
+                       #mbox-cells = <1>;
+               };
+
                timer@b120000 {
                        #address-cells = <1>;
                        #size-cells = <1>;