MIPS: ath79: ar9331: add Ethernet nodes

Add ethernet nodes supported by ag71xx driver.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi b/arch/mips/boot/dts/qca/ar9331.dtsi
index 2bae201aa365106ac262865b0ba407fe36905599..63a9f33aa43e8de626e59cbf57fddf77528ef4f8 100644 (file)
--- a/arch/mips/boot/dts/qca/ar9331.dtsi
+++ b/arch/mips/boot/dts/qca/ar9331.dtsi
@@ -116,6 +116,32 @@ rst: reset-controller@1806001c {
                        };
                };
 
+               eth0: ethernet@19000000 {
+                       compatible = "qca,ar9330-eth";
+                       reg = <0x19000000 0x200>;
+                       interrupts = <4>;
+
+                       resets = <&rst 9>, <&rst 22>;
+                       reset-names = "mac", "mdio";
+                       clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+                       clock-names = "eth", "mdio";
+
+                       status = "disabled";
+               };
+
+               eth1: ethernet@1a000000 {
+                       compatible = "qca,ar9330-eth";
+                       reg = <0x1a000000 0x200>;
+                       interrupts = <5>;
+
+                       resets = <&rst 13>, <&rst 23>;
+                       reset-names = "mac", "mdio";
+                       clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+                       clock-names = "eth", "mdio";
+
+                       status = "disabled";
+               };
+
                usb: usb@1b000100 {
                        compatible = "chipidea,usb2";
                        reg = <0x1b000000 0x200>;

diff --git a/arch/mips/boot/dts/qca/ar9331_dpt_module.dts b/arch/mips/boot/dts/qca/ar9331_dpt_module.dts
index e7af2cf5f4c1991856e319c4ff4e31fbe1cceeff..77bab823eb3b0836113e663a0dcb733b98183055 100644 (file)
--- a/arch/mips/boot/dts/qca/ar9331_dpt_module.dts
+++ b/arch/mips/boot/dts/qca/ar9331_dpt_module.dts
@@ -76,3 +76,11 @@ spiflash: w25q128@0 {
                reg = <0>;
        };
 };
+
+&eth0 {
+       status = "okay";
+};
+
+&eth1 {
+       status = "okay";
+};