Merge tag 'v4.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git...

Fixed pin numbers for uart4 on rk3288, iommu clocks and small changes
over multiple boards like default serial setting for rk3288-tinker,
output selection for the dp83867 on the phycore-som and the newly
added pwm-backlight delay properties for veyron boards.

* tag 'v4.18-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: default serial for rk3288 Tinker Board
  ARM: dts: rockchip: set PWM delay backlight settings for Minnie
  ARM: dts: rockchip: set PWM delay backlight settings for Veyron
  ARM: dts: rockchip: add clocks in iommu nodes
  ARM: dts: rockchip: Add dp83867 CLK_OUT muxing on rk3288-phycore-som
  ARM: dts: rockchip: fix uart4 pin-numbers for rk3288

Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index a97458112ff6e80ca198fe1377521372973e8ca4..567a6a725f9cc889ce19a81aad4b8dbb24bb96bb 100644 (file)
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -197,6 +197,8 @@ vop_mmu: iommu@10118300 {
                reg = <0x10118300 0x100>;
                interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vop_mmu";
+               clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index df1e478586753ccbd9cf889108466e45d200f2a4..be80e9a2c9af16fbf10e9cb6ee143a4f0d3151c7 100644 (file)
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -584,6 +584,8 @@ vpu_mmu: iommu@20020800 {
                reg = <0x20020800 0x100>;
                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vpu_mmu";
+               clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+               clock-names = "aclk", "iface";
                iommu-cells = <0>;
                status = "disabled";
        };
@@ -593,6 +595,8 @@ vdec_mmu: iommu@20030480 {
                reg = <0x20030480 0x40>, <0x200304c0 0x40>;
                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vdec_mmu";
+               clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
+               clock-names = "aclk", "iface";
                iommu-cells = <0>;
                status = "disabled";
        };
@@ -602,6 +606,8 @@ vop_mmu: iommu@20053f00 {
                reg = <0x20053f00 0x100>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vop_mmu";
+               clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+               clock-names = "aclk", "iface";
                iommu-cells = <0>;
                status = "disabled";
        };
@@ -611,6 +617,8 @@ iep_mmu: iommu@20070800 {
                reg = <0x20070800 0x100>;
                interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "iep_mmu";
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk", "iface";
                iommu-cells = <0>;
                status = "disabled";
        };

diff --git a/arch/arm/boot/dts/rk3288-phycore-som.dtsi b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
index f13bcb1cd3d9888ee9caa77d4c326d6f01e10cd5..aaab2d171ffe1da4716fbd959d1e6eacd3e891b9 100644 (file)
--- a/arch/arm/boot/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-phycore-som.dtsi
@@ -151,6 +151,7 @@ phy0: ethernet-phy@0 {
                        ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                        ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
                        enet-phy-lane-no-swap;
+                       ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_TCLK>;
                };
        };
 };

diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index 346b0d8b474d9995f000d0dd3fedca46cff755cf..127488f9f17460133f802e206f598c11a766735c 100644 (file)
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -49,6 +49,10 @@ / {
        model = "Rockchip RK3288 Tinker Board";
        compatible = "asus,rk3288-tinker", "rockchip,rk3288";
 
+       chosen {
+               stdout-path = "serial2:115200n8";
+       };
+
        memory {
                reg = <0x0 0x0 0x0 0x80000000>;
                device_type = "memory";

diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
index be487111d0252ece0b27c324dab7a1b2bad94b95..b16d570ff029b74da108fa1df3d0d60e1c314953 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
@@ -95,7 +95,8 @@ backlight: backlight {
                pinctrl-names = "default";
                pinctrl-0 = <&bl_en>;
                pwms = <&pwm0 0 1000000 0>;
-               pwm-delay-us = <10000>;
+               post-pwm-on-delay-ms = <10>;
+               pwm-off-delay-ms = <10>;
        };
 
        gpio-charger {

diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
index 544de6027aaa0fcb9f4f11a94b9367534f77afab..4c5307e62001e4fc6172e4a1b80a63bdb73c6f20 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
@@ -123,6 +123,8 @@ &backlight {
                        240 241 242 243 244 245 246 247
                        248 249 250 251 252 253 254 255>;
        power-supply = <&backlight_regulator>;
+       post-pwm-on-delay-ms = <200>;
+       pwm-off-delay-ms = <200>;
 };
 
 &emmc {

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 354aff45c1afca2dcec62e420602c01237c5b04e..d7e49d29ace540fe4022b8822b84840ebdb5b65a 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -959,6 +959,8 @@ iep_mmu: iommu@ff900800 {
                reg = <0x0 0xff900800 0x0 0x40>;
                interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "iep_mmu";
+               clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -968,6 +970,8 @@ isp_mmu: iommu@ff914000 {
                reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "isp_mmu";
+               clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                rockchip,disable-mmu-reset;
                status = "disabled";
@@ -1027,6 +1031,8 @@ vopb_mmu: iommu@ff930300 {
                reg = <0x0 0xff930300 0x0 0x100>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vopb_mmu";
+               clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
+               clock-names = "aclk", "iface";
                power-domains = <&power RK3288_PD_VIO>;
                #iommu-cells = <0>;
                status = "disabled";
@@ -1075,6 +1081,8 @@ vopl_mmu: iommu@ff940300 {
                reg = <0x0 0xff940300 0x0 0x100>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vopl_mmu";
+               clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
+               clock-names = "aclk", "iface";
                power-domains = <&power RK3288_PD_VIO>;
                #iommu-cells = <0>;
                status = "disabled";
@@ -1206,6 +1214,8 @@ vpu_mmu: iommu@ff9a0800 {
                reg = <0x0 0xff9a0800 0x0 0x100>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "vpu_mmu";
+               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -1215,6 +1225,8 @@ hevc_mmu: iommu@ff9c0440 {
                reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
                interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "hevc_mmu";
+               clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
+               clock-names = "aclk", "iface";
                #iommu-cells = <0>;
                status = "disabled";
        };
@@ -1848,16 +1860,16 @@ uart3_rts: uart3-rts {
 
                uart4 {
                        uart4_xfer: uart4-xfer {
-                               rockchip,pins = <5 12 3 &pcfg_pull_up>,
-                                               <5 13 3 &pcfg_pull_none>;
+                               rockchip,pins = <5 15 3 &pcfg_pull_up>,
+                                               <5 14 3 &pcfg_pull_none>;
                        };
 
                        uart4_cts: uart4-cts {
-                               rockchip,pins = <5 14 3 &pcfg_pull_up>;
+                               rockchip,pins = <5 12 3 &pcfg_pull_up>;
                        };
 
                        uart4_rts: uart4-rts {
-                               rockchip,pins = <5 15 3 &pcfg_pull_none>;
+                               rockchip,pins = <5 13 3 &pcfg_pull_none>;
                        };
                };