]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/i915: Create a common GEN9_LP_FEATURE.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 1 Dec 2016 09:33:16 +0000 (11:33 +0200)
committerAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Thu, 1 Dec 2016 11:41:26 +0000 (13:41 +0200)
The following LP platform inherits a lot of this platform
So let's simplify here to re-use this later.

v2: Keep ddb_size out of the new macro.
v3: Rebase (has_decoupled_mmio). (Imre)

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1480584796-19466-1-git-send-email-ander.conselvan.de.oliveira@intel.com
drivers/gpu/drm/i915/i915_pci.c

index fce8e198bc760d891e1a7c3113bdff86d0b92190..2797dec5c9f1c7049ef203538550136f0553b8fd 100644 (file)
@@ -343,31 +343,34 @@ static const struct intel_device_info intel_skylake_gt3_info = {
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
+#define GEN9_LP_FEATURES \
+       .gen = 9, \
+       .has_hotplug = 1, \
+       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
+       .num_pipes = 3, \
+       .has_64bit_reloc = 1, \
+       .has_ddi = 1, \
+       .has_fpga_dbg = 1, \
+       .has_fbc = 1, \
+       .has_runtime_pm = 1, \
+       .has_pooled_eu = 0, \
+       .has_csr = 1, \
+       .has_resource_streamer = 1, \
+       .has_rc6 = 1, \
+       .has_dp_mst = 1, \
+       .has_gmbus_irq = 1, \
+       .has_hw_contexts = 1, \
+       .has_logical_ring_contexts = 1, \
+       .has_guc = 1, \
+       .has_decoupled_mmio = 1, \
+       GEN_DEFAULT_PIPEOFFSETS, \
+       IVB_CURSOR_OFFSETS, \
+       BDW_COLORS
+
 static const struct intel_device_info intel_broxton_info = {
        .is_broxton = 1,
-       .gen = 9,
-       .has_hotplug = 1,
-       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
-       .num_pipes = 3,
-       .has_64bit_reloc = 1,
-       .has_ddi = 1,
-       .has_fpga_dbg = 1,
-       .has_fbc = 1,
-       .has_runtime_pm = 1,
-       .has_pooled_eu = 0,
-       .has_csr = 1,
-       .has_resource_streamer = 1,
-       .has_rc6 = 1,
-       .has_dp_mst = 1,
-       .has_gmbus_irq = 1,
-       .has_hw_contexts = 1,
-       .has_logical_ring_contexts = 1,
-       .has_guc = 1,
-       .has_decoupled_mmio = 1,
+       GEN9_LP_FEATURES,
        .ddb_size = 512,
-       GEN_DEFAULT_PIPEOFFSETS,
-       IVB_CURSOR_OFFSETS,
-       BDW_COLORS,
 };
 
 static const struct intel_device_info intel_kabylake_info = {