]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
irqchip: Add documentation for the bcm2836 interrupt controller
authorEric Anholt <eric@anholt.net>
Thu, 6 Aug 2015 23:00:32 +0000 (16:00 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Thu, 20 Aug 2015 20:38:42 +0000 (22:38 +0200)
This is a new per-cpu root interrupt controller on the Raspberry Pi 2,
which will chain to the bcm2835 interrupt controller for peripheral
interrupts.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-rpi-kernel@lists.infradead.org
Cc: Lee Jones <lee@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1438902033-31477-4-git-send-email-eric@anholt.net
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt
new file mode 100644 (file)
index 0000000..f320dcd
--- /dev/null
@@ -0,0 +1,37 @@
+BCM2836 per-CPU interrupt controller
+
+The BCM2836 has a per-cpu interrupt controller for the timer, PMU
+events, and SMP IPIs.  One of the CPUs may receive interrupts for the
+peripheral (GPU) events, which chain to the BCM2835-style interrupt
+controller.
+
+Required properties:
+
+- compatible:          Should be "brcm,bcm2836-l1-intc"
+- reg:                 Specifies base physical address and size of the
+                         registers
+- interrupt-controller:        Identifies the node as an interrupt controller
+- #interrupt-cells:    Specifies the number of cells needed to encode an
+                         interrupt source. The value shall be 1
+
+Please refer to interrupts.txt in this directory for details of the common
+Interrupt Controllers bindings used by client devices.
+
+The interrupt sources are as follows:
+
+0: CNTPSIRQ
+1: CNTPNSIRQ
+2: CNTHPIRQ
+3: CNTVIRQ
+8: GPU_FAST
+9: PMU_FAST
+
+Example:
+
+local_intc: local_intc {
+       compatible = "brcm,bcm2836-l1-intc";
+       reg = <0x40000000 0x100>;
+       interrupt-controller;
+       #interrupt-cells = <1>;
+       interrupt-parent = <&local_intc>;
+};