arm64: dts: qcom: qcs404: Add missing space for cooling-cells property

There should be a space both before and after the equal sign.
Add a missing space for the cooling cells property.

Fixes: f48cee3239a1 ("arm64: dts: qcom: qcs404: Add thermal zones for each sensor")
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Acked-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 01a51f381850e3732077cc777ae61ece6cba2a6c..3d0789775009c1d88ea639fe0cbca26d7d2cfa1d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -35,7 +35,7 @@ CPU0: cpu@100 {
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
                        next-level-cache = <&L2_0>;
-                       #cooling-cells= <2>;
+                       #cooling-cells = <2>;
                };
 
                CPU1: cpu@101 {
@@ -45,7 +45,7 @@ CPU1: cpu@101 {
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
                        next-level-cache = <&L2_0>;
-                       #cooling-cells= <2>;
+                       #cooling-cells = <2>;
                };
 
                CPU2: cpu@102 {
@@ -55,7 +55,7 @@ CPU2: cpu@102 {
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
                        next-level-cache = <&L2_0>;
-                       #cooling-cells= <2>;
+                       #cooling-cells = <2>;
                };
 
                CPU3: cpu@103 {
@@ -65,7 +65,7 @@ CPU3: cpu@103 {
                        enable-method = "psci";
                        cpu-idle-states = <&CPU_SLEEP_0>;
                        next-level-cache = <&L2_0>;
-                       #cooling-cells= <2>;
+                       #cooling-cells = <2>;
                };
 
                L2_0: l2-cache {