]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: renesas: r8a7795: sort subnodes of the root node
authorSimon Horman <horms+renesas@verge.net.au>
Fri, 23 Mar 2018 10:04:05 +0000 (11:04 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 16 Apr 2018 14:02:42 +0000 (16:02 +0200)
Sort subnodes of the root node alphanumerically.

This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.

Also remove excessive line-wrapping of interrupts-extended property of
timer node.

This should not have any run-time effect.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a7795.dtsi

index 1d5e3ac0231ca6ab31a55c1ab7bbdccd7dff002e..bb96c7e2337094ee9be0856d2735ca8277e4df8b 100644 (file)
@@ -30,6 +30,91 @@ aliases {
                i2c7 = &i2c_dvfs;
        };
 
+       /*
+        * The external audio clocks are configured as 0 Hz fixed frequency
+        * clocks by default.
+        * Boards that provide audio clocks should override them.
+        */
+       audio_clk_a: audio_clk_a {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       audio_clk_b: audio_clk_b {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       audio_clk_c: audio_clk_c {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       /* External CAN clock - to be overridden by boards that provide it */
+       can_clk: can {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       cluster0_opp: opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <830000>;
+                       clock-latency-ns = <300000>;
+               };
+               opp-1000000000 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <830000>;
+                       clock-latency-ns = <300000>;
+               };
+               opp-1500000000 {
+                       opp-hz = /bits/ 64 <1500000000>;
+                       opp-microvolt = <830000>;
+                       clock-latency-ns = <300000>;
+                       opp-suspend;
+               };
+               opp-1600000000 {
+                       opp-hz = /bits/ 64 <1600000000>;
+                       opp-microvolt = <900000>;
+                       clock-latency-ns = <300000>;
+                       turbo-mode;
+               };
+               opp-1700000000 {
+                       opp-hz = /bits/ 64 <1700000000>;
+                       opp-microvolt = <960000>;
+                       clock-latency-ns = <300000>;
+                       turbo-mode;
+               };
+       };
+
+       cluster1_opp: opp_table1 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-800000000 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <820000>;
+                       clock-latency-ns = <300000>;
+               };
+               opp-1000000000 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <820000>;
+                       clock-latency-ns = <300000>;
+               };
+               opp-1200000000 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <820000>;
+                       clock-latency-ns = <300000>;
+               };
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -155,91 +240,6 @@ extalr_clk: extalr {
                clock-frequency = <0>;
        };
 
-       /*
-        * The external audio clocks are configured as 0 Hz fixed frequency
-        * clocks by default.
-        * Boards that provide audio clocks should override them.
-        */
-       audio_clk_a: audio_clk_a {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <0>;
-       };
-
-       audio_clk_b: audio_clk_b {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <0>;
-       };
-
-       audio_clk_c: audio_clk_c {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <0>;
-       };
-
-       /* External CAN clock - to be overridden by boards that provide it */
-       can_clk: can {
-               compatible = "fixed-clock";
-               #clock-cells = <0>;
-               clock-frequency = <0>;
-       };
-
-       cluster0_opp: opp_table0 {
-               compatible = "operating-points-v2";
-               opp-shared;
-
-               opp-500000000 {
-                       opp-hz = /bits/ 64 <500000000>;
-                       opp-microvolt = <830000>;
-                       clock-latency-ns = <300000>;
-               };
-               opp-1000000000 {
-                       opp-hz = /bits/ 64 <1000000000>;
-                       opp-microvolt = <830000>;
-                       clock-latency-ns = <300000>;
-               };
-               opp-1500000000 {
-                       opp-hz = /bits/ 64 <1500000000>;
-                       opp-microvolt = <830000>;
-                       clock-latency-ns = <300000>;
-                       opp-suspend;
-               };
-               opp-1600000000 {
-                       opp-hz = /bits/ 64 <1600000000>;
-                       opp-microvolt = <900000>;
-                       clock-latency-ns = <300000>;
-                       turbo-mode;
-               };
-               opp-1700000000 {
-                       opp-hz = /bits/ 64 <1700000000>;
-                       opp-microvolt = <960000>;
-                       clock-latency-ns = <300000>;
-                       turbo-mode;
-               };
-       };
-
-       cluster1_opp: opp_table1 {
-               compatible = "operating-points-v2";
-               opp-shared;
-
-               opp-800000000 {
-                       opp-hz = /bits/ 64 <800000000>;
-                       opp-microvolt = <820000>;
-                       clock-latency-ns = <300000>;
-               };
-               opp-1000000000 {
-                       opp-hz = /bits/ 64 <1000000000>;
-                       opp-microvolt = <820000>;
-                       clock-latency-ns = <300000>;
-               };
-               opp-1200000000 {
-                       opp-hz = /bits/ 64 <1200000000>;
-                       opp-microvolt = <820000>;
-                       clock-latency-ns = <300000>;
-               };
-       };
-
        /* External PCIe clock - can be overridden by the board */
        pcie_bus_clk: pcie_bus {
                compatible = "fixed-clock";
@@ -247,18 +247,6 @@ pcie_bus_clk: pcie_bus {
                clock-frequency = <0>;
        };
 
-       pmu_a57 {
-               compatible = "arm,cortex-a57-pmu";
-               interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-affinity = <&a57_0>,
-                                    <&a57_1>,
-                                    <&a57_2>,
-                                    <&a57_3>;
-       };
-
        pmu_a53 {
                compatible = "arm,cortex-a53-pmu";
                interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
@@ -271,6 +259,18 @@ pmu_a53 {
                                     <&a53_3>;
        };
 
+       pmu_a57 {
+               compatible = "arm,cortex-a57-pmu";
+               interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&a57_0>,
+                                    <&a57_1>,
+                                    <&a57_2>,
+                                    <&a57_3>;
+       };
+
        psci {
                compatible = "arm,psci-1.0", "arm,psci-0.2";
                method = "smc";
@@ -2428,22 +2428,6 @@ tsc: thermal@e6198000 {
                };
        };
 
-       timer {
-               compatible = "arm,armv8-timer";
-               interrupts-extended = <&gic GIC_PPI 13
-                                      (GIC_CPU_MASK_SIMPLE(8) |
-                                      IRQ_TYPE_LEVEL_LOW)>,
-                                     <&gic GIC_PPI 14
-                                      (GIC_CPU_MASK_SIMPLE(8) |
-                                      IRQ_TYPE_LEVEL_LOW)>,
-                                     <&gic GIC_PPI 11
-                                      (GIC_CPU_MASK_SIMPLE(8) |
-                                      IRQ_TYPE_LEVEL_LOW)>,
-                                     <&gic GIC_PPI 10
-                                      (GIC_CPU_MASK_SIMPLE(8) |
-                                      IRQ_TYPE_LEVEL_LOW)>;
-       };
-
        thermal-zones {
                sensor_thermal1: sensor-thermal1 {
                        polling-delay-passive = <250>;
@@ -2524,6 +2508,14 @@ map0 {
                };
        };
 
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+                                     <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+                                     <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+                                     <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+       };
+
        /* External USB clocks - can be overridden by the board */
        usb3s0_clk: usb3s0 {
                compatible = "fixed-clock";