ARM: ux500: fix clock for GPIO block 8

The clock assignment in the device tree for GPIO block 8 was
incorrect, indicating this was managed by bit 1 on PRCC 6
while it was in fact bit 1 on PRCC 5.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 2ef30c1c19975c767d562f86cce7bf7daedfb4bd..55abf1292ddd6fa1f0e0aee6cf469bb15f5b175d 100644 (file)
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -227,7 +227,7 @@ gpio8: gpio@a03fe000 {
                        #gpio-cells = <2>;
                        gpio-bank = <8>;
 
-                       clocks = <&prcc_pclk 6 1>;
+                       clocks = <&prcc_pclk 5 1>;
                };
 
                pinctrl {