]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
RDMA/hns: Support cq record doorbell for kernel space
authorYixian Liu <liuyixian@huawei.com>
Fri, 9 Mar 2018 10:36:32 +0000 (18:36 +0800)
committerDoug Ledford <dledford@redhat.com>
Tue, 13 Mar 2018 20:40:15 +0000 (16:40 -0400)
This patch updates to support cq record doorbell for
the kernel space.

Signed-off-by: Yixian Liu <liuyixian@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Shaobo Xu <xushaobo2@huawei.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
drivers/infiniband/hw/hns/hns_roce_cq.c
drivers/infiniband/hw/hns/hns_roce_device.h
drivers/infiniband/hw/hns/hns_roce_hw_v2.c

index 8226f19fcdd68f9528251c8f6fe9927dc0f58b98..462b644bbbd78b67f984193e9ad8881184bd7f09 100644 (file)
@@ -358,12 +358,21 @@ struct ib_cq *hns_roce_ib_create_cq(struct ib_device *ib_dev,
                /* Get user space parameters */
                uar = &to_hr_ucontext(context)->uar;
        } else {
+               if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB) {
+                       ret = hns_roce_alloc_db(hr_dev, &hr_cq->db, 1);
+                       if (ret)
+                               goto err_cq;
+
+                       hr_cq->set_ci_db = hr_cq->db.db_record;
+                       *hr_cq->set_ci_db = 0;
+               }
+
                /* Init mmt table and write buff address to mtt table */
                ret = hns_roce_ib_alloc_cq_buf(hr_dev, &hr_cq->hr_buf,
                                               cq_entries);
                if (ret) {
                        dev_err(dev, "Failed to alloc_cq_buf.\n");
-                       goto err_cq;
+                       goto err_db;
                }
 
                uar = &hr_dev->priv_uar;
@@ -436,6 +445,10 @@ struct ib_cq *hns_roce_ib_create_cq(struct ib_device *ib_dev,
                hns_roce_ib_free_cq_buf(hr_dev, &hr_cq->hr_buf,
                                        hr_cq->ib_cq.cqe);
 
+err_db:
+       if (!context && (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB))
+               hns_roce_free_db(hr_dev, &hr_cq->db);
+
 err_cq:
        kfree(hr_cq);
        return ERR_PTR(ret);
@@ -465,6 +478,8 @@ int hns_roce_ib_destroy_cq(struct ib_cq *ib_cq)
                        /* Free the buff of stored cq */
                        hns_roce_ib_free_cq_buf(hr_dev, &hr_cq->hr_buf,
                                                ib_cq->cqe);
+                       if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB)
+                               hns_roce_free_db(hr_dev, &hr_cq->db);
                }
 
                kfree(hr_cq);
index 56e73516d802897191bea9677265ce968c50c59f..fb305b7f99a8b16c67a5f06045e247c9e31a2ec9 100644 (file)
@@ -395,6 +395,7 @@ struct hns_roce_cq {
        struct hns_roce_uar             *uar;
        u32                             cq_depth;
        u32                             cons_index;
+       u32                             *set_ci_db;
        void __iomem                    *cq_db_l;
        u16                             *tptr_addr;
        int                             arm_sn;
index ca978520462a90422d99b98342916e2fec0fae84..684c2d1a0ed0157ad2af4c45b9bfbe50394506c5 100644 (file)
@@ -1497,24 +1497,7 @@ static struct hns_roce_v2_cqe *next_cqe_sw_v2(struct hns_roce_cq *hr_cq)
 
 static void hns_roce_v2_cq_set_ci(struct hns_roce_cq *hr_cq, u32 cons_index)
 {
-       struct hns_roce_v2_cq_db cq_db;
-
-       cq_db.byte_4 = 0;
-       cq_db.parameter = 0;
-
-       roce_set_field(cq_db.byte_4, V2_CQ_DB_BYTE_4_TAG_M,
-                      V2_CQ_DB_BYTE_4_TAG_S, hr_cq->cqn);
-       roce_set_field(cq_db.byte_4, V2_CQ_DB_BYTE_4_CMD_M,
-                      V2_CQ_DB_BYTE_4_CMD_S, HNS_ROCE_V2_CQ_DB_PTR);
-
-       roce_set_field(cq_db.parameter, V2_CQ_DB_PARAMETER_CONS_IDX_M,
-                      V2_CQ_DB_PARAMETER_CONS_IDX_S,
-                      cons_index & ((hr_cq->cq_depth << 1) - 1));
-       roce_set_field(cq_db.parameter, V2_CQ_DB_PARAMETER_CMD_SN_M,
-                      V2_CQ_DB_PARAMETER_CMD_SN_S, 1);
-
-       hns_roce_write64_k((__be32 *)&cq_db, hr_cq->cq_db_l);
-
+       *hr_cq->set_ci_db = cons_index & 0xffffff;
 }
 
 static void __hns_roce_v2_cq_clean(struct hns_roce_cq *hr_cq, u32 qpn,