]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: berlin: Add AHCI and SATA PHY nodes to BG2
authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Thu, 30 Oct 2014 10:21:27 +0000 (11:21 +0100)
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tue, 11 Nov 2014 23:17:12 +0000 (00:17 +0100)
Add DT nodes for the AHCI controller and SATA PHY found on Marvell
Berlin2 SoCs.

Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
arch/arm/boot/dts/berlin2.dtsi

index 20e7c394a0086d861ebe5ad725c81e0f8c07f04c..015a06c67c91cf2dd3801deb200f4aed409d1bf5 100644 (file)
@@ -311,6 +311,45 @@ aic: interrupt-controller@3000 {
                        };
                };
 
+               ahci: sata@e90000 {
+                       compatible = "marvell,berlin2-ahci", "generic-ahci";
+                       reg = <0xe90000 0x1000>;
+                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&chip CLKID_SATA>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       sata0: sata-port@0 {
+                               reg = <0>;
+                               phys = <&sata_phy 0>;
+                               status = "disabled";
+                       };
+
+                       sata1: sata-port@1 {
+                               reg = <1>;
+                               phys = <&sata_phy 1>;
+                               status = "disabled";
+                       };
+               };
+
+               sata_phy: phy@e900a0 {
+                       compatible = "marvell,berlin2-sata-phy";
+                       reg = <0xe900a0 0x200>;
+                       clocks = <&chip CLKID_SATA>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #phy-cells = <1>;
+                       status = "disabled";
+
+                       sata-phy@0 {
+                               reg = <0>;
+                       };
+
+                       sata-phy@1 {
+                               reg = <1>;
+                       };
+               };
+
                chip: chip-control@ea0000 {
                        compatible = "marvell,berlin2-chip-ctrl";
                        #clock-cells = <1>;