ARM: sun7i: Add audio PLL

The A20 uses the PLL2 as the audio PLL, which is the parent of all the
other audio clocks in the system (i2s, codec, etc.). Add it to the DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 3a68852f670675f0ce9be5ae23ee50710f1d2491..433ec1415e56e49a42223c3e166d8dc9f0d7d584 100644 (file)
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -199,6 +199,15 @@ pll1: clk@01c20000 {
                        clock-output-names = "pll1";
                };
 
+               pll2: clk@01c20008 {
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun4i-a10-pll2-clk";
+                       reg = <0x01c20008 0x8>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "pll2-1x", "pll2-2x",
+                                            "pll2-4x", "pll2-8x";
+               };
+
                pll4: clk@01c20018 {
                        #clock-cells = <0>;
                        compatible = "allwinner,sun7i-a20-pll4-clk";