]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/radeon: prepare header files for drmP.h removal
authorSam Ravnborg <sam@ravnborg.org>
Sat, 8 Jun 2019 08:02:39 +0000 (10:02 +0200)
committerSam Ravnborg <sam@ravnborg.org>
Mon, 10 Jun 2019 20:30:24 +0000 (22:30 +0200)
While removing drmP.h from all .c files the list of
header files are also sorted alphabetically.
To allow this adjust the header files to pull in
the dependencies they needed to allow this.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20190608080241.4958-6-sam@ravnborg.org
drivers/gpu/drm/radeon/btc_dpm.h
drivers/gpu/drm/radeon/ci_dpm.h
drivers/gpu/drm/radeon/clearstate_cayman.h
drivers/gpu/drm/radeon/clearstate_ci.h
drivers/gpu/drm/radeon/clearstate_si.h
drivers/gpu/drm/radeon/r100_track.h
drivers/gpu/drm/radeon/r600_dpm.h
drivers/gpu/drm/radeon/radeon_trace.h
drivers/gpu/drm/radeon/rv770_dpm.h
drivers/gpu/drm/radeon/sumo_dpm.h

index 3b6f12b7760ba48066f2144b73e0dc82c6521946..ec4cbb4aa77ce4d2864d3d447ed9aed17d9ba0e5 100644 (file)
@@ -23,6 +23,9 @@
 #ifndef __BTC_DPM_H__
 #define __BTC_DPM_H__
 
+#include "radeon.h"
+#include "rv770_dpm.h"
+
 #define BTC_RLP_UVD_DFLT                              20
 #define BTC_RMP_UVD_DFLT                              50
 #define BTC_LHP_UVD_DFLT                              50
index dff2a63df38f7b0182a13a1367e0983bcd4c12ef..ac12db5f2cf7bbbc578eff2a4203acdf1f4fafe1 100644 (file)
@@ -24,6 +24,7 @@
 #define __CI_DPM_H__
 
 #include "ppsmc.h"
+#include "radeon.h"
 
 #define SMU__NUM_SCLK_DPM_STATE  8
 #define SMU__NUM_MCLK_DPM_LEVELS 6
index e48a14037b76d1ae94ec458fa3900de0b080cf08..4774e04c4da65345719b50b2f5c3b715138a640a 100644 (file)
@@ -21,6 +21,8 @@
  *
  */
 
+#include "clearstate_defs.h"
+
 static const u32 SECT_CONTEXT_def_1[] =
 {
     0x00000000, // DB_RENDER_CONTROL
index f55d06664e310c0251021993899400c50d45dc37..c1b6c22dbed7367b01a1e19fc9ad216420fb5981 100644 (file)
@@ -21,6 +21,8 @@
  *
  */
 
+#include "clearstate_defs.h"
+
 static const unsigned int ci_SECT_CONTEXT_def_1[] =
 {
     0x00000000, // DB_RENDER_CONTROL
index 66e39cdb5cb0dc5ff1fbac239c6895b825a443ed..356219c6c7f278770cd645e9ca88c1ee660becd2 100644 (file)
@@ -21,6 +21,8 @@
  *
  */
 
+#include "clearstate_defs.h"
+
 static const u32 si_SECT_CONTEXT_def_1[] =
 {
     0x00000000, // DB_RENDER_CONTROL
index 57e2b09784be921ea130947e88e108bb7ac07e9e..1b5ff3f816db3a5a5ca2d0d72f8e2175f0c4b5a2 100644 (file)
@@ -1,5 +1,7 @@
 /* SPDX-License-Identifier: MIT */
 
+#include "radeon.h"
+
 #define R100_TRACK_MAX_TEXTURE 3
 #define R200_TRACK_MAX_TEXTURE 6
 #define R300_TRACK_MAX_TEXTURE 16
index bd499d749bc980d96b49472d7206665dfb3ab175..6e4d22ed2a0063df045561a1c1d6bacb7087c63e 100644 (file)
@@ -23,6 +23,8 @@
 #ifndef __R600_DPM_H__
 #define __R600_DPM_H__
 
+#include "radeon.h"
+
 #define R600_ASI_DFLT                                10000
 #define R600_BSP_DFLT                                0x41EB
 #define R600_BSU_DFLT                                0x2
index f7346db33b86cb647ccb48781d3212493a789056..c93f3ab3c4e300dde29ea3b9021f2dfc1336f825 100644 (file)
@@ -3,8 +3,10 @@
 #define _RADEON_TRACE_H_
 
 #include <linux/stringify.h>
-#include <linux/types.h>
 #include <linux/tracepoint.h>
+#include <linux/types.h>
+
+#include <drm/drm_file.h>
 
 #undef TRACE_SYSTEM
 #define TRACE_SYSTEM radeon
index d12beab7f3e63c566486ec33583236bbd132bbe9..d81ccf153c33f4e599677ae5111e2374393fc0c0 100644 (file)
@@ -23,6 +23,7 @@
 #ifndef __RV770_DPM_H__
 #define __RV770_DPM_H__
 
+#include "radeon.h"
 #include "rv770_smc.h"
 
 struct rv770_clock_registers {
index 07dda299c7849b939833f59f78c0016a4a0b1acd..f1651135a47abba738100a69164f96686af018a4 100644 (file)
@@ -24,6 +24,7 @@
 #define __SUMO_DPM_H__
 
 #include "atom.h"
+#include "radeon.h"
 
 #define SUMO_MAX_HARDWARE_POWERLEVELS 5
 #define SUMO_PM_NUMBER_OF_TC 15