net: ethernet: mediatek: Integrate GDM/PSE setup operations

Integrate GDM/PSE setup operations into single function "mtk_gdm_config"

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 385a4ab9ec9949ec30f5415df40a32152ff870d8..df07d237eef0e19e88117e01295642ad7b4532fa 100644 (file)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2180,6 +2180,28 @@ static int mtk_start_dma(struct mtk_eth *eth)
        return 0;
 }
 
+static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
+{
+       int i;
+
+       for (i = 0; i < MTK_MAC_COUNT; i++) {
+               u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
+
+               /* default setup the forward port to send frame to PDMA */
+               val &= ~0xffff;
+
+               /* Enable RX checksum */
+               val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
+
+               val |= config;
+
+               mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
+       }
+       /* Reset and enable PSE */
+       mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
+       mtk_w32(eth, 0, MTK_RST_GL);
+}
+
 static int mtk_open(struct net_device *dev)
 {
        struct mtk_mac *mac = netdev_priv(dev);
@@ -2375,8 +2397,6 @@ static int mtk_hw_init(struct mtk_eth *eth)
        mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
        mtk_tx_irq_disable(eth, ~0);
        mtk_rx_irq_disable(eth, ~0);
-       mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
-       mtk_w32(eth, 0, MTK_RST_GL);
 
        /* FE int grouping */
        mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
@@ -2385,18 +2405,7 @@ static int mtk_hw_init(struct mtk_eth *eth)
        mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
        mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
 
-       for (i = 0; i < MTK_MAC_COUNT; i++) {
-               u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
-
-               /* setup the forward port to send frame to PDMA */
-               val &= ~0xffff;
-
-               /* Enable RX checksum */
-               val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
-
-               /* setup the mac dma */
-               mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-       }
+       mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
 
        return 0;
 

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 76bd12cb8150c76b5833c173b89164fdfbf90463..b16d8d9b196a8c26e15c647254a42c5e55c27df5 100644 (file)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -84,6 +84,7 @@
 #define MTK_GDMA_ICS_EN                BIT(22)
 #define MTK_GDMA_TCS_EN                BIT(21)
 #define MTK_GDMA_UCS_EN                BIT(20)
+#define MTK_GDMA_TO_PDMA       0x0
 
 /* Unicast Filter MAC Address Register - Low */
 #define MTK_GDMA_MAC_ADRL(x)   (0x508 + (x * 0x1000))