]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: dra7-evm: Add pinmux configuration for MMC
authorKishon Vijay Abraham I <kishon@ti.com>
Wed, 16 Aug 2017 13:45:01 +0000 (19:15 +0530)
committerTony Lindgren <tony@atomide.com>
Wed, 16 Aug 2017 14:54:08 +0000 (07:54 -0700)
Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra7-evm.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dra7-evm.dts

index 5e3f9ba861f08fe1cfb5ec1918617d90057d2ff1..aa426dabb6c349d9f1b5a4a0173ae30ad3b7cc58 100644 (file)
@@ -9,6 +9,7 @@
 
 #include "dra74x.dtsi"
 #include "dra7-evm-common.dtsi"
+#include "dra74x-mmc-iodelay.dtsi"
 
 / {
        model = "TI DRA742";
@@ -326,8 +327,6 @@ p1 {
 
 &mmc1 {
        status = "okay";
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc1_pins_default>;
        vmmc-supply = <&evm_3v3_sd>;
        vqmmc-supply = <&ldo1_reg>;
        bus-width = <4>;
@@ -336,14 +335,29 @@ &mmc1 {
         * is always hardwired.
         */
        cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
+       pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104";
+       pinctrl-0 = <&mmc1_pins_default>;
+       pinctrl-1 = <&mmc1_pins_hs>;
+       pinctrl-2 = <&mmc1_pins_sdr12>;
+       pinctrl-3 = <&mmc1_pins_sdr25>;
+       pinctrl-4 = <&mmc1_pins_sdr50>;
+       pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
+       pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
+       pinctrl-7 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
+       pinctrl-8 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
 };
 
 &mmc2 {
        status = "okay";
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc2_pins_default>;
        vmmc-supply = <&evm_1v8_sw>;
        bus-width = <8>;
+       pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v";
+       pinctrl-0 = <&mmc2_pins_default>;
+       pinctrl-1 = <&mmc2_pins_hs>;
+       pinctrl-2 = <&mmc2_pins_ddr_1_8v_rev11 &mmc2_iodelay_ddr_1_8v_rev11_conf>;
+       pinctrl-3 = <&mmc2_pins_ddr_rev20>;
+       pinctrl-4 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev11_conf>;
+       pinctrl-5 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
 };
 
 &cpu0 {