]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dt: sun5i: Add A13 SPI controller nodes
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Sat, 22 Feb 2014 21:35:57 +0000 (22:35 +0100)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 24 Feb 2014 09:02:49 +0000 (10:02 +0100)
The A13 has 3 SPI controllers compatible with the one found in the A10. Add
them in the DT.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun5i-a13.dtsi

index 6caf65dbf187ec5b00340a2f937ff1b4b4b478b6..cda1d4bbe2e2acde5d46d974ff70415d523ec008 100644 (file)
@@ -298,6 +298,39 @@ soc@01c00000 {
                #size-cells = <1>;
                ranges;
 
+               spi0: spi@01c05000 {
+                       compatible = "allwinner,sun4i-a10-spi";
+                       reg = <0x01c05000 0x1000>;
+                       interrupts = <10>;
+                       clocks = <&ahb_gates 20>, <&spi0_clk>;
+                       clock-names = "ahb", "mod";
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               spi1: spi@01c06000 {
+                       compatible = "allwinner,sun4i-a10-spi";
+                       reg = <0x01c06000 0x1000>;
+                       interrupts = <11>;
+                       clocks = <&ahb_gates 21>, <&spi1_clk>;
+                       clock-names = "ahb", "mod";
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               spi2: spi@01c17000 {
+                       compatible = "allwinner,sun4i-a10-spi";
+                       reg = <0x01c17000 0x1000>;
+                       interrupts = <12>;
+                       clocks = <&ahb_gates 22>, <&spi2_clk>;
+                       clock-names = "ahb", "mod";
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                intc: interrupt-controller@01c20400 {
                        compatible = "allwinner,sun4i-ic";
                        reg = <0x01c20400 0x400>;