ARM: dts: aspeed: Fix hwrng register address

The register address should be the full address of the rng, not the
offset from the start of the SCU.

Fixes: 5daa8212c08e ("ARM: dts: aspeed: Describe random number device")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 5e947ed496c2800a21e61e7e20952debc2c3581a..75df1573380e923ac7f9bacdd5b8edb381a897c8 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -145,9 +145,9 @@ pinctrl: pinctrl {
 
                        };
 
-                       rng: hwrng@78 {
+                       rng: hwrng@1e6e2078 {
                                compatible = "timeriomem_rng";
-                               reg = <0x78 0x4>;
+                               reg = <0x1e6e2078 0x4>;
                                period = <1>;
                                quality = <100>;
                        };

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 24eec00c4a95235701809b47098c88ae1ab1aad4..17f2714d18a7ec09e4722d557831379e38157b89 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -189,9 +189,9 @@ pinctrl: pinctrl {
                                };
                        };
 
-                       rng: hwrng@78 {
+                       rng: hwrng@1e6e2078 {
                                compatible = "timeriomem_rng";
-                               reg = <0x78 0x4>;
+                               reg = <0x1e6e2078 0x4>;
                                period = <1>;
                                quality = <100>;
                        };