]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
habanalabs: remove trailing blank line from EOF
authorOded Gabbay <oded.gabbay@gmail.com>
Sun, 31 Mar 2019 08:29:53 +0000 (11:29 +0300)
committerOded Gabbay <oded.gabbay@gmail.com>
Sun, 31 Mar 2019 08:29:53 +0000 (11:29 +0300)
GIT does not like extra blank lines at the end of the file, so this patch
removes those lines.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
91 files changed:
drivers/misc/habanalabs/include/goya/asic_reg/cpu_ca53_cfg_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/cpu_ca53_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/cpu_if_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/cpu_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_0_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_1_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_2_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_3_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_4_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_macro_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_macro_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_nrtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_0_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_0_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_1_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_2_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_3_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_4_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/ic_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mc_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme1_rtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme1_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme2_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme3_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme4_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme5_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme6_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_cmdq_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_qm_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mmu_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mmu_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/pci_nrtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/pci_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/pcie_aux_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_emmc_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_global_conf_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_global_conf_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_mme_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_pci_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_spi_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x0_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x1_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x2_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x3_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x4_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/stlb_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/stlb_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cfg_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cmdq_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_eml_cfg_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_eml_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_nrtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_qm_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc_pll_regs.h

index 2cf5c46b6e8ec7d90b22e34becf586e13b4bc8d3..4e0dbbbbde209b3b8c2ba5f762843129fa57508d 100644 (file)
 #define CPU_CA53_CFG_ARM_PMU_EVENT_MASK                              0x3FFFFFFF
 
 #endif /* ASIC_REG_CPU_CA53_CFG_MASKS_H_ */
-
index 840ccffa1081a7858befb1de55ed9021f8eed6c5..f3faf1aad91a7978b30d518e72cb0c039b164c62 100644 (file)
@@ -58,4 +58,3 @@
 #define mmCPU_CA53_CFG_ARM_PMU_1                                     0x441214
 
 #endif /* ASIC_REG_CPU_CA53_CFG_REGS_H_ */
-
index f23cb3e41c30885317dc883741aa3c3004fb33e0..cf657918962a246ade31e6f67f1848084c25c845 100644 (file)
@@ -46,4 +46,3 @@
 #define mmCPU_IF_AXI_SPLIT_INTR                                      0x442130
 
 #endif /* ASIC_REG_CPU_IF_REGS_H_ */
-
index 8fc97f838ada8b952a4dfccd61d1e5856a82346a..8c8f9726d4b904c31aa3000bd70224764539ff44 100644 (file)
 #define mmCPU_PLL_FREQ_CALC_EN                                       0x4A2440
 
 #endif /* ASIC_REG_CPU_PLL_REGS_H_ */
-
index 61c8cd9ce58b50a181d1ee152d792dc46e3bed98..0b246fe6ad042ae09c51dc47834f9429d821ca16 100644 (file)
 #define mmDMA_CH_0_MEM_INIT_BUSY                                     0x4011FC
 
 #endif /* ASIC_REG_DMA_CH_0_REGS_H_ */
-
index 92960ef5e308aafa96e4867f8cd3fd63b783a0d7..5449031722f21d2bd38543c9b9fd68eab3f99476 100644 (file)
 #define mmDMA_CH_1_MEM_INIT_BUSY                                     0x4091FC
 
 #endif /* ASIC_REG_DMA_CH_1_REGS_H_ */
-
index 4e37871a51bb2e24cd6f6d4bcfa4b7a23993b8ff..a4768521d18a8dcdfb650d6f2fb447b2b5eee288 100644 (file)
 #define mmDMA_CH_2_MEM_INIT_BUSY                                     0x4111FC
 
 #endif /* ASIC_REG_DMA_CH_2_REGS_H_ */
-
index a2d6aeb32a1847f7777ce8da0f25ac7e3275a18f..619d01897ff8d71eb284f6092550c841a317e7bd 100644 (file)
 #define mmDMA_CH_3_MEM_INIT_BUSY                                     0x4191FC
 
 #endif /* ASIC_REG_DMA_CH_3_REGS_H_ */
-
index 400d6fd3acf5affb595a324fe1be0895be942564..038617e163f1942696740654a0ff76dff85b9ce7 100644 (file)
 #define mmDMA_CH_4_MEM_INIT_BUSY                                     0x4211FC
 
 #endif /* ASIC_REG_DMA_CH_4_REGS_H_ */
-
index 8d965443c51efd2bb87c49db32612eb51bca0c58..f43b564af1beef205186c10e471a7176daba5bcf 100644 (file)
 #define DMA_MACRO_RAZWI_HBW_RD_ID_R_MASK                             0x1FFFFFFF
 
 #endif /* ASIC_REG_DMA_MACRO_MASKS_H_ */
-
index 8bfcb001189d7b723333f0e65f0d6552ce15fddd..c3bfc1b8e3fde817455a4bfff3f769df18e3cbfc 100644 (file)
 #define mmDMA_MACRO_RAZWI_HBW_RD_ID                                  0x4B0158
 
 #endif /* ASIC_REG_DMA_MACRO_REGS_H_ */
-
index 9f33f351a3c1fe6780104e239918b326f096645a..bc977488c0720bab38c413d0ed112fd244772651 100644 (file)
 #define DMA_NRTR_NON_LIN_SCRAMB_EN_MASK                              0x1
 
 #endif /* ASIC_REG_DMA_NRTR_MASKS_H_ */
-
index d8293745a02b722bb9d2bb05fa003539a2e782a6..c4abc7ff1fc6f5e41d03713354c81a17d2ad1671 100644 (file)
 #define mmDMA_NRTR_NON_LIN_SCRAMB                                    0x1C0604
 
 #endif /* ASIC_REG_DMA_NRTR_REGS_H_ */
-
index 10619dbb9b1729951fb4acda81f4c1f24fc6bf50..b17f72c31ab60d672788442a740da30bfed1aa0b 100644 (file)
 #define DMA_QM_0_CQ_BUF_RDATA_VAL_MASK                               0xFFFFFFFF
 
 #endif /* ASIC_REG_DMA_QM_0_MASKS_H_ */
-
index c693bc5dcb22d0351df3115a67ea5ddb2961b66b..bf360b301154b755993bb0894a060e8e853f75d2 100644 (file)
 #define mmDMA_QM_0_CQ_BUF_RDATA                                      0x40030C
 
 #endif /* ASIC_REG_DMA_QM_0_REGS_H_ */
-
index da928390f89c97e41049dbc30b40545a257c90a7..51d432d05ac433a8f537e9b89ce6c04c10a3f68a 100644 (file)
 #define mmDMA_QM_1_CQ_BUF_RDATA                                      0x40830C
 
 #endif /* ASIC_REG_DMA_QM_1_REGS_H_ */
-
index b4f06e9b71d6189ff2783ff98ec83807532195cf..18fc0c2b6cc27aceaa08476f445e752c9c95fd6c 100644 (file)
 #define mmDMA_QM_2_CQ_BUF_RDATA                                      0x41030C
 
 #endif /* ASIC_REG_DMA_QM_2_REGS_H_ */
-
index 53e3cd78a06bc785c417bbe934eba9d4bd6e45d3..6cf7204bf5cc692907bf87c59cb453d4be15a8b6 100644 (file)
 #define mmDMA_QM_3_CQ_BUF_RDATA                                      0x41830C
 
 #endif /* ASIC_REG_DMA_QM_3_REGS_H_ */
-
index e0eb5f2602011efc4326ab6e894bc5d0214590c2..36fef2682875bb64a2c47ce84bdb87bac6b4a5a2 100644 (file)
 #define mmDMA_QM_4_CQ_BUF_RDATA                                      0x42030C
 
 #endif /* ASIC_REG_DMA_QM_4_REGS_H_ */
-
index 0a743817aad7d1f5495d4afe98052712fc09ea3d..4ae7fed8b18cfdfea00bf3c290e930dd83ad2af1 100644 (file)
 #define mmIC_PLL_FREQ_CALC_EN                                        0x4A3440
 
 #endif /* ASIC_REG_IC_PLL_REGS_H_ */
-
index 4408188aa06793083f1f31fa5824082a55697240..6d35d852798b449bdfcc01dc77b820a3b30855bf 100644 (file)
 #define mmMC_PLL_FREQ_CALC_EN                                        0x4A1440
 
 #endif /* ASIC_REG_MC_PLL_REGS_H_ */
-
index 687bca5c5fe34527b4a139392bd211b0cca10b97..6c23f8b96e7ef371bfa6b142efdc81e1d481896d 100644 (file)
 #define MME1_RTR_NON_LIN_SCRAMB_EN_MASK                              0x1
 
 #endif /* ASIC_REG_MME1_RTR_MASKS_H_ */
-
index c248339a1cbebf6af58e6a43058ee4a8dcef6a69..122e9d529939e6d68b18c6067e8769248ccb90f6 100644 (file)
 #define mmMME1_RTR_NON_LIN_SCRAMB                                    0x40604
 
 #endif /* ASIC_REG_MME1_RTR_REGS_H_ */
-
index 7a2b777bdc4ff92ad87e5e733c443cc8f44668b1..00ce2252bbfbe82efe10d3a1788ece96df5302c7 100644 (file)
 #define mmMME2_RTR_NON_LIN_SCRAMB                                    0x80604
 
 #endif /* ASIC_REG_MME2_RTR_REGS_H_ */
-
index b78f8bc387fc750c58922d5039e341c482868cff..8e3eb7fd207026b73830159233a67e8e5e115484 100644 (file)
 #define mmMME3_RTR_NON_LIN_SCRAMB                                    0xC0604
 
 #endif /* ASIC_REG_MME3_RTR_REGS_H_ */
-
index d9a4a02cefa3b34c24515411ce18bed9a78c8c2f..79b67bbc8567ee8307453edb70cbb94e8089e70b 100644 (file)
 #define mmMME4_RTR_NON_LIN_SCRAMB                                    0x100604
 
 #endif /* ASIC_REG_MME4_RTR_REGS_H_ */
-
index 205adc988407fbd9f774e8a6123f4cb4e3f4382c..0ac3c37ce47ffc5a55db6ac470814c02f198c3ee 100644 (file)
 #define mmMME5_RTR_NON_LIN_SCRAMB                                    0x140604
 
 #endif /* ASIC_REG_MME5_RTR_REGS_H_ */
-
index fcec68388278acd0326da5232d223ed1e3cc6efb..50c49cce72a64884eb63a5d621aacb4e022e2fb6 100644 (file)
 #define mmMME6_RTR_NON_LIN_SCRAMB                                    0x180604
 
 #endif /* ASIC_REG_MME6_RTR_REGS_H_ */
-
index a0d4382fbbd075c41e34a99ffcd38f50b0cc2d8c..fe7d95bdcef9c0270ff4af69e5b1074ad52fbcde 100644 (file)
 #define MME_CMDQ_CQ_BUF_RDATA_VAL_MASK                               0xFFFFFFFF
 
 #endif /* ASIC_REG_MME_CMDQ_MASKS_H_ */
-
index 5c2f6b870a58b0a4078d7451ac0d40ff0ae8ab00..5f8b85d2b4b1b0eecd086afea9d9a8d28a9fd270 100644 (file)
 #define mmMME_CMDQ_CQ_BUF_RDATA                                      0xD930C
 
 #endif /* ASIC_REG_MME_CMDQ_REGS_H_ */
-
index c7b1b0bb33841301f003f0c5b93a78253d32349d..1882c413cbe0432bf6f2ad3042d1a38fac8c91ec 100644 (file)
 #define MME_SHADOW_3_E_BUBBLES_PER_SPLIT_ID_MASK                     0xFF000000
 
 #endif /* ASIC_REG_MME_MASKS_H_ */
-
index d4bfa58dce1997b6691ca168ba5eef4a0377dab8..e464e381555c40de405e63364d0dbca71c82c95c 100644 (file)
 #define MME_QM_CQ_BUF_RDATA_VAL_MASK                                 0xFFFFFFFF
 
 #endif /* ASIC_REG_MME_QM_MASKS_H_ */
-
index b5b1c776f6c3b440bce874656db8938d068f7a4c..538708beffc9c593c3f34cef9f8e540732f7807b 100644 (file)
 #define mmMME_QM_CQ_BUF_RDATA                                        0xD830C
 
 #endif /* ASIC_REG_MME_QM_REGS_H_ */
-
index 9436b1e2705a25140a593d7146039c428bd4406d..0396cbfd5c8903981325b910663047c8ef0b7187 100644 (file)
 #define mmMME_SHADOW_3_E_BUBBLES_PER_SPLIT                           0xD0BAC
 
 #endif /* ASIC_REG_MME_REGS_H_ */
-
index 3a78078d3c4c65b6ff33eb9ff14ffb472f83505a..c3e69062b135aa66193efeabdfb1e5bfd3dc0bef 100644 (file)
 #define MMU_ACCESS_ERROR_CAPTURE_VA_VA_31_0_MASK                     0xFFFFFFFF
 
 #endif /* ASIC_REG_MMU_MASKS_H_ */
-
index bec6c014135cc4a4711a134c12077ae318d8348f..7ec81f12031e0917a25e3274db529ad0f2540006 100644 (file)
@@ -50,4 +50,3 @@
 #define mmMMU_ACCESS_ERROR_CAPTURE_VA                                0x480040
 
 #endif /* ASIC_REG_MMU_REGS_H_ */
-
index 209e41402a11188c088c7462d9b5b020aec8223a..ceb59f2e28b3f1560ce3b748fa46e67c9e1fea1e 100644 (file)
 #define PCI_NRTR_NON_LIN_SCRAMB_EN_MASK                              0x1
 
 #endif /* ASIC_REG_PCI_NRTR_MASKS_H_ */
-
index 447e5d4e7dc81580c71c0fbc3539c31b7d0d7e9a..dd067f301ac2ca4e5e489ad1b4cdcdd577dcff5c 100644 (file)
 #define mmPCI_NRTR_NON_LIN_SCRAMB                                    0x604
 
 #endif /* ASIC_REG_PCI_NRTR_REGS_H_ */
-
index daaf5d9079dc3036295fd4d1b399bf2ac64b5f2a..35b1d8ac6f63f922bcaaf89dd043ceae87704a20 100644 (file)
 #define mmPCIE_AUX_PERST                                             0xC079B8
 
 #endif /* ASIC_REG_PCIE_AUX_REGS_H_ */
-
index 8eda4de58788491fcb4bd8ac88dfc227655f8874..9271ea95ebe9bfa332b97affb132c9bdca1c214a 100644 (file)
 #define mmPSOC_EMMC_PLL_FREQ_CALC_EN                                 0xC70440
 
 #endif /* ASIC_REG_PSOC_EMMC_PLL_REGS_H_ */
-
index d4bf0e1db4df87dea684fce99648794166467b30..324266653c9aff3a1b45e5db0e3992711f2ed786 100644 (file)
 #define PSOC_GLOBAL_CONF_PAD_SEL_VAL_MASK                            0x3
 
 #endif /* ASIC_REG_PSOC_GLOBAL_CONF_MASKS_H_ */
-
index cfbdd2c9c5c753a4fb9093e46996b036ffc9ff88..8141f422e712bcb3bc308c9b8a736ea260444d82 100644 (file)
 #define mmPSOC_GLOBAL_CONF_PAD_SEL_81                                0xC4BA44
 
 #endif /* ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_ */
-
index 6723d8f76f307242c6a32d725bccda952b0c8cc1..4789ebb9c3372ca15a2d430a09226a5154f19004 100644 (file)
 #define mmPSOC_MME_PLL_FREQ_CALC_EN                                  0xC71440
 
 #endif /* ASIC_REG_PSOC_MME_PLL_REGS_H_ */
-
index abcded0531c9db56490e81d8388d4454f1b41399..27a296ea6c3dac2b3a147daeb8d91acd0893799c 100644 (file)
 #define mmPSOC_PCI_PLL_FREQ_CALC_EN                                  0xC72440
 
 #endif /* ASIC_REG_PSOC_PCI_PLL_REGS_H_ */
-
index 5925c7477c25f0d493ca039f5450e6e931cf44a1..66aee7fa6b1e1e84aea2b54b4ce606710d16a0c6 100644 (file)
 #define mmPSOC_SPI_RSVD_2                                            0xC430FC
 
 #endif /* ASIC_REG_PSOC_SPI_REGS_H_ */
-
index d56c9fa0e7badd8da930a457cb4d70d3eda17b41..2ea1770b078f229fe7997045ff096260a1b56184 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X0_RTR_DBG_L_ARB_MAX                               0x201330
 
 #endif /* ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_ */
-
index 5624544303ca9126708e713d4e11a75897ecb834..37e0713efa73f3f55211a25fa75307986922b99c 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X1_RTR_DBG_L_ARB_MAX                               0x205330
 
 #endif /* ASIC_REG_SRAM_Y0_X1_RTR_REGS_H_ */
-
index 3322bc0bd1df1471d9b42eef3c94284aa25f8dfc..d2572279a2b920e0f42a9cd7681d5a4e2a7ced1a 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X2_RTR_DBG_L_ARB_MAX                               0x209330
 
 #endif /* ASIC_REG_SRAM_Y0_X2_RTR_REGS_H_ */
-
index 81e393db202720cd61db1c4c047c99d251d2bcfa..68c5b402c5067cdab4b3f444a05ade4d8cd50789 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X3_RTR_DBG_L_ARB_MAX                               0x20D330
 
 #endif /* ASIC_REG_SRAM_Y0_X3_RTR_REGS_H_ */
-
index b2e11b1de385b495b40d7088258970a2a8841558..a42f1ba06d28fcc27239b5b497d81578477a4cae 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X4_RTR_DBG_L_ARB_MAX                               0x211330
 
 #endif /* ASIC_REG_SRAM_Y0_X4_RTR_REGS_H_ */
-
index b4ea8cae2757b45e7c49396143b42df88bc4d218..94f2ed4a36bd27265b199e9bbe1108426bb084ad 100644 (file)
 #define STLB_SRAM_INIT_BUSY_DATA_MASK                                0x10
 
 #endif /* ASIC_REG_STLB_MASKS_H_ */
-
index 0f5281d3e65b62c0a1dbca1662f9d54c18554315..35013f65acd2d3a20cc795100d03917ad79c887f 100644 (file)
@@ -52,4 +52,3 @@
 #define mmSTLB_SRAM_INIT                                             0x49004C
 
 #endif /* ASIC_REG_STLB_REGS_H_ */
-
index e5587b49eecd4d6a6ed97dc22396e9c929897d21..89c9507a512fa32ad9a65c6490a46ac2546af61b 100644 (file)
 #define TPC0_CFG_FUNC_MBIST_MEM_LAST_FAILED_PATTERN_MASK             0x70000000
 
 #endif /* ASIC_REG_TPC0_CFG_MASKS_H_ */
-
index 2be28a63c50ab5af65596cd171bd90d11ab5ac1d..7d71c4b73a5e9be0383613a9393b85e2a3658f69 100644 (file)
 #define mmTPC0_CFG_FUNC_MBIST_MEM_9                                  0xE06E2C
 
 #endif /* ASIC_REG_TPC0_CFG_REGS_H_ */
-
index 9aa2d8b53207fe0fcbacc7a2a6b00c91b58369d4..9395f2458771a5d46fdb5ee7faae4b6ae48caf44 100644 (file)
 #define TPC0_CMDQ_CQ_BUF_RDATA_VAL_MASK                              0xFFFFFFFF
 
 #endif /* ASIC_REG_TPC0_CMDQ_MASKS_H_ */
-
index 3572752ba66ec42627d432d7945c87f700680301..bc51df573bf09a1c95c269f43c4c6c74b674c7ec 100644 (file)
 #define mmTPC0_CMDQ_CQ_BUF_RDATA                                     0xE0930C
 
 #endif /* ASIC_REG_TPC0_CMDQ_REGS_H_ */
-
index ed866d93c44036d944d809be3d9944c2d9149795..553c6b6bd5ec6d4cc8238d33d38359fbe465f751 100644 (file)
 #define TPC0_EML_CFG_DBG_INST_INSERT_CTL_INSERT_MASK                 0x1
 
 #endif /* ASIC_REG_TPC0_EML_CFG_MASKS_H_ */
-
index f1a1b4fa4841e956739d84f369eb4fcdaef78361..8495479c36595e72a960f7ffe509458a675a543c 100644 (file)
 #define mmTPC0_EML_CFG_DBG_INST_INSERT_CTL                           0x3040334
 
 #endif /* ASIC_REG_TPC0_EML_CFG_REGS_H_ */
-
index 7f86621179a55519ed862a7393543e25de4487bb..43fafcf010410846f246aa676235f3ecc5947467 100644 (file)
 #define TPC0_NRTR_NON_LIN_SCRAMB_EN_MASK                             0x1
 
 #endif /* ASIC_REG_TPC0_NRTR_MASKS_H_ */
-
index dc280f4e66081902c630261f722c27944e46687a..ce3346dd2042e743517438077f21ed2fdfbd075d 100644 (file)
 #define mmTPC0_NRTR_NON_LIN_SCRAMB                                   0xE00604
 
 #endif /* ASIC_REG_TPC0_NRTR_REGS_H_ */
-
index 80d97ee3d8d6c30526460c55f2d44b1de1626a54..2e4b45947944fc6d2affba2bc5423798845066d6 100644 (file)
 #define TPC0_QM_CQ_BUF_RDATA_VAL_MASK                                0xFFFFFFFF
 
 #endif /* ASIC_REG_TPC0_QM_MASKS_H_ */
-
index 7552d4ba61febd64814735da68ea7857a203bed2..4fa09eb88878120692c380a3ac9f22df22ecfd19 100644 (file)
 #define mmTPC0_QM_CQ_BUF_RDATA                                       0xE0830C
 
 #endif /* ASIC_REG_TPC0_QM_REGS_H_ */
-
index 19894413474aceafaa8f3fadd6c0b463f953c29f..928eef1808aefe2d0a43a8ff04805e03e7ba9d97 100644 (file)
 #define mmTPC1_CFG_FUNC_MBIST_MEM_9                                  0xE46E2C
 
 #endif /* ASIC_REG_TPC1_CFG_REGS_H_ */
-
index 9099ebd7ab238fb258f76889b45081605fa8381d..30ae0f30732865be52cffca4b48749dd1a4e7446 100644 (file)
 #define mmTPC1_CMDQ_CQ_BUF_RDATA                                     0xE4930C
 
 #endif /* ASIC_REG_TPC1_CMDQ_REGS_H_ */
-
index bc8b9a10391f58483178a19d8ea9f808691d418b..b95de4f95ba9dcd0252ffca7bc03aad45d2e6ddf 100644 (file)
 #define mmTPC1_QM_CQ_BUF_RDATA                                       0xE4830C
 
 #endif /* ASIC_REG_TPC1_QM_REGS_H_ */
-
index ae267f8f457e75a4b156bf7ba238f406b1dc8456..0f91e307879e964803899d801c1ee2dd7a20da96 100644 (file)
 #define mmTPC1_RTR_NON_LIN_SCRAMB                                    0xE40604
 
 #endif /* ASIC_REG_TPC1_RTR_REGS_H_ */
-
index 9c33fc039036fc40a345de082bff238d01742767..73421227f35bb5e55744db75a5f8e3fb5ada6dfa 100644 (file)
 #define mmTPC2_CFG_FUNC_MBIST_MEM_9                                  0xE86E2C
 
 #endif /* ASIC_REG_TPC2_CFG_REGS_H_ */
-
index 7a643887d6e1c9accaee53c41bc5f87da1e3e04f..27b66bf2da9f45e2fc17a4e80e8a0f4d4d645e8e 100644 (file)
 #define mmTPC2_CMDQ_CQ_BUF_RDATA                                     0xE8930C
 
 #endif /* ASIC_REG_TPC2_CMDQ_REGS_H_ */
-
index f3e32c018064cd2604ce729a5e668dab95ccb2d5..31e5b2f5390514aa059235c41db65287f898d3bc 100644 (file)
 #define mmTPC2_QM_CQ_BUF_RDATA                                       0xE8830C
 
 #endif /* ASIC_REG_TPC2_QM_REGS_H_ */
-
index 0eb0cd1fbd19bc5b0eaf4b2f4c001d63163b87cf..4eddeaa15d948ecfd74226c62e9bd325430a561e 100644 (file)
 #define mmTPC2_RTR_NON_LIN_SCRAMB                                    0xE80604
 
 #endif /* ASIC_REG_TPC2_RTR_REGS_H_ */
-
index 0baf63c69b255c0aeeb9292c947720ce541e37af..ce573a1a8361b7a2f0d2bb1b39ef2552def536bd 100644 (file)
 #define mmTPC3_CFG_FUNC_MBIST_MEM_9                                  0xEC6E2C
 
 #endif /* ASIC_REG_TPC3_CFG_REGS_H_ */
-
index 82a5261e852f5932e084c9253280fee795b8b3cf..11d81fca0a0fee009a4523bcea8af47078819b76 100644 (file)
 #define mmTPC3_CMDQ_CQ_BUF_RDATA                                     0xEC930C
 
 #endif /* ASIC_REG_TPC3_CMDQ_REGS_H_ */
-
index b05b1e18e664730ee9381a6c88a2ce56287786c8..e41595a19e69114860d84aa0f260598234128ed0 100644 (file)
 #define mmTPC3_QM_CQ_BUF_RDATA                                       0xEC830C
 
 #endif /* ASIC_REG_TPC3_QM_REGS_H_ */
-
index 5a2fd76526508d617b5d4ae69f7bac8e65ab199a..34a438b1efe5d7598273f79f9ae4db3c317266b4 100644 (file)
 #define mmTPC3_RTR_NON_LIN_SCRAMB                                    0xEC0604
 
 #endif /* ASIC_REG_TPC3_RTR_REGS_H_ */
-
index d64a100075f290969bbba78597d447cd91e187b4..d44caf0fc1bb00d31a3165bf47ae5d8e3e0edd96 100644 (file)
 #define mmTPC4_CFG_FUNC_MBIST_MEM_9                                  0xF06E2C
 
 #endif /* ASIC_REG_TPC4_CFG_REGS_H_ */
-
index 565b42885b0d1e9683634374a3b64af14cab4c9c..f13a6532961ff2a0174dee4cd924755d15d14d2a 100644 (file)
 #define mmTPC4_CMDQ_CQ_BUF_RDATA                                     0xF0930C
 
 #endif /* ASIC_REG_TPC4_CMDQ_REGS_H_ */
-
index 196da3f1271026b58f7e99851b9256424ecc9b9c..db081fc17cfc095bdfc5355aa8db135a057aed65 100644 (file)
 #define mmTPC4_QM_CQ_BUF_RDATA                                       0xF0830C
 
 #endif /* ASIC_REG_TPC4_QM_REGS_H_ */
-
index 8b54041d144a065f6f44622309f2c662caa2c0d7..8c5372303b28ad1fc19d5e27fbc90c44c4ee8607 100644 (file)
 #define mmTPC4_RTR_NON_LIN_SCRAMB                                    0xF00604
 
 #endif /* ASIC_REG_TPC4_RTR_REGS_H_ */
-
index 3f00954fcdba8897926acaacac94db88c2316909..5139fde710117f4503e33a25bda0b1740994732b 100644 (file)
 #define mmTPC5_CFG_FUNC_MBIST_MEM_9                                  0xF46E2C
 
 #endif /* ASIC_REG_TPC5_CFG_REGS_H_ */
-
index d8e72a8e18d7aa2b288c3d8a6fb51d445b574f4e..1e7cd6e1e88831bd191d43d2310138a4c138ceb6 100644 (file)
 #define mmTPC5_CMDQ_CQ_BUF_RDATA                                     0xF4930C
 
 #endif /* ASIC_REG_TPC5_CMDQ_REGS_H_ */
-
index be2e68624709554e98f5004d48a455b5786613e6..ac0d3820cd6b853890392007e037e03307162226 100644 (file)
 #define mmTPC5_QM_CQ_BUF_RDATA                                       0xF4830C
 
 #endif /* ASIC_REG_TPC5_QM_REGS_H_ */
-
index 6f301c7bbc2f6dfa7c2d6e82150ecdc2601cafca..57f83bc3b17d654fc2436dcb8af9884ab7b9814c 100644 (file)
 #define mmTPC5_RTR_NON_LIN_SCRAMB                                    0xF40604
 
 #endif /* ASIC_REG_TPC5_RTR_REGS_H_ */
-
index 1e1168601c41e100e49fa0802aaf70373f10ca50..94e0191c06c18fc4a7619f331b06c8eb283ab0fe 100644 (file)
 #define mmTPC6_CFG_FUNC_MBIST_MEM_9                                  0xF86E2C
 
 #endif /* ASIC_REG_TPC6_CFG_REGS_H_ */
-
index fbca6b47284ed850d88567342b985584cfcc83c6..7a1a0e87b22557e091d6b6ace71437b27b5cf888 100644 (file)
 #define mmTPC6_CMDQ_CQ_BUF_RDATA                                     0xF8930C
 
 #endif /* ASIC_REG_TPC6_CMDQ_REGS_H_ */
-
index bf32465dabcb1a3be21c0574ce65c4b5218df4ae..80fa0fe0f60f4896e8e0ef34d86f10119d9275e8 100644 (file)
 #define mmTPC6_QM_CQ_BUF_RDATA                                       0xF8830C
 
 #endif /* ASIC_REG_TPC6_QM_REGS_H_ */
-
index 609bb90e10467ff6ead2e3bca016c18b7ec5f19c..d6cae8b8af669d441b4cc9ca7bcef00920db986c 100644 (file)
 #define mmTPC6_RTR_NON_LIN_SCRAMB                                    0xF80604
 
 #endif /* ASIC_REG_TPC6_RTR_REGS_H_ */
-
index bf2fd0f73906b79d4d5c39f7e483f87df83cd66f..234147adb7796ddaa8f2ae1dc0a1f726516add04 100644 (file)
 #define mmTPC7_CFG_FUNC_MBIST_MEM_9                                  0xFC6E2C
 
 #endif /* ASIC_REG_TPC7_CFG_REGS_H_ */
-
index 65d83043bf630c8f87e3636291c348865d052a53..4c160632fe7d7428b0ae16fa52a3b425d54a5ddd 100644 (file)
 #define mmTPC7_CMDQ_CQ_BUF_RDATA                                     0xFC930C
 
 #endif /* ASIC_REG_TPC7_CMDQ_REGS_H_ */
-
index 3d5848d873043c28b5c0f46830873781fc781aee..0c13d4d167aa96d52331a18e8e826ede0820722b 100644 (file)
 #define mmTPC7_NRTR_NON_LIN_SCRAMB                                   0xFC0604
 
 #endif /* ASIC_REG_TPC7_NRTR_REGS_H_ */
-
index 25f5095f68fb902fcc6d1cc1d76bada9409d7348..cbe11425bfb0ab87a2d12f0df4a2bb28205dce46 100644 (file)
 #define mmTPC7_QM_CQ_BUF_RDATA                                       0xFC830C
 
 #endif /* ASIC_REG_TPC7_QM_REGS_H_ */
-
index 920231d0afa521040fda6263676588172b5bc016..e25e19660a9db99969c08aaf1b6ae5031b4d170a 100644 (file)
 #define mmTPC_PLL_FREQ_CALC_EN                                       0xE01440
 
 #endif /* ASIC_REG_TPC_PLL_REGS_H_ */
-