ARC: [plat-axs10x]: use pgu pll instead of fixed clock

Use PLL driver instead of fixed-clock for PGU pixel clock.
That allows us to support wider range of graphic modes.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index 6ec1fcdfc0d7f791a06847f3e68452cb847d337c..79ec27c043c1da7c2901b985fc3a56e3b22a6541 100644 (file)
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -28,6 +28,12 @@ core_clk: core_clk {
                        clock-frequency = <750000000>;
                };
 
+               input_clk: input-clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <33333333>;
+               };
+
                core_intc: arc700-intc@cpu {
                        compatible = "snps,arc700-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 08bcfed6b80f57d82bdda14340e9ed61b1e35a2c..f9a5c9ddcae7db28c720d11f8ab7c5d78448fd1d 100644 (file)
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -61,12 +61,13 @@ mmcclk: mmcclk {
                                clock-frequency = <25000000>;
                                #clock-cells = <0>;
                        };
+               };
 
-                       pguclk: pguclk {
-                               #clock-cells = <0>;
-                               compatible = "fixed-clock";
-                               clock-frequency = <74250000>;
-                       };
+               pguclk: pguclk@10080 {
+                       compatible = "snps,axs10x-pgu-pll-clock";
+                       reg = <0x10080 0x10>, <0x110 0x10>;
+                       #clock-cells = <0>;
+                       clocks = <&input_clk>;
                };
 
                gmac: ethernet@18000 {