dt-bindings: reset: Fix typo in imx8mq resets

Some of the mipi dsi resets were called

  IMX8MQ_RESET_MIPI_DIS__

instead of

  IMX8MQ_RESET_MIPI_DSI__

Since they're DSI related this looks like a typo. This fixes the
only in tree user as well to not break bisecting.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 3ecd770f910b9bfe92d51c53acdc79fac2527743..1443a55a0c298f98a2bb2579dd75b0535dd399f3 100644 (file)
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
        [IMX8MQ_RESET_OTG2_PHY_RESET]           = { SRC_USBOPHY2_RCR, BIT(0) },
        [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N]    = { SRC_MIPIPHY_RCR, BIT(1) },
        [IMX8MQ_RESET_MIPI_DSI_RESET_N]         = { SRC_MIPIPHY_RCR, BIT(2) },
-       [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N]     = { SRC_MIPIPHY_RCR, BIT(3) },
-       [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N]     = { SRC_MIPIPHY_RCR, BIT(4) },
-       [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N]    = { SRC_MIPIPHY_RCR, BIT(5) },
+       [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N]     = { SRC_MIPIPHY_RCR, BIT(3) },
+       [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N]     = { SRC_MIPIPHY_RCR, BIT(4) },
+       [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N]    = { SRC_MIPIPHY_RCR, BIT(5) },
        [IMX8MQ_RESET_PCIEPHY]                  = { SRC_PCIEPHY_RCR,
                                                    BIT(2) | BIT(1) },
        [IMX8MQ_RESET_PCIEPHY_PERST]            = { SRC_PCIEPHY_RCR, BIT(3) },
@@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
 
        case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
        case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN:   /* fallthrough */
-       case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N:        /* fallthrough */
-       case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
-       case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
+       case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N:        /* fallthrough */
+       case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
+       case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
        case IMX8MQ_RESET_MIPI_DSI_RESET_N:     /* fallthrough */
        case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N:        /* fallthrough */
                value = assert ? 0 : bit;

diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h
index f17ef2a972f64b28a7790a05dae9473ea28a8316..9a301082d361b71a0870edf9bbb68acf8489f840 100644 (file)
--- a/include/dt-bindings/reset/imx8mq-reset.h
+++ b/include/dt-bindings/reset/imx8mq-reset.h
@@ -31,9 +31,9 @@
 #define IMX8MQ_RESET_OTG2_PHY_RESET            20
 #define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N     21
 #define IMX8MQ_RESET_MIPI_DSI_RESET_N          22
-#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N      23
-#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N      24
-#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N     25
+#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N      23
+#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N      24
+#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N     25
 #define IMX8MQ_RESET_PCIEPHY                   26
 #define IMX8MQ_RESET_PCIEPHY_PERST             27
 #define IMX8MQ_RESET_PCIE_CTRL_APPS_EN         28