]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
clk: imx7ulp: Correct system clock source option #7
authorAnson Huang <Anson.Huang@nxp.com>
Mon, 14 Oct 2019 00:56:05 +0000 (08:56 +0800)
committerShawn Guo <shawnguo@kernel.org>
Sat, 26 Oct 2019 08:15:52 +0000 (16:15 +0800)
In the latest reference manual Rev.0,06/2019, the SCS's option #7
is no longer from upll, it is reserved, update clock driver accordingly.

Fixes: b1260067ac3d ("clk: imx: add imx7ulp clk driver")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx7ulp.c

index 2022d9bead9152f39a31230fd3a4534ed5f06fb4..b2c58661168ecd00457b439cef4e31519b3dd96d 100644 (file)
@@ -24,7 +24,7 @@ static const char * const spll_pfd_sels[]     = { "spll_pfd0", "spll_pfd1", "spll_pf
 static const char * const spll_sels[]          = { "spll", "spll_pfd_sel", };
 static const char * const apll_pfd_sels[]      = { "apll_pfd0", "apll_pfd1", "apll_pfd2", "apll_pfd3", };
 static const char * const apll_sels[]          = { "apll", "apll_pfd_sel", };
-static const char * const scs_sels[]           = { "dummy", "sosc", "sirc", "firc", "dummy", "apll_sel", "spll_sel", "upll", };
+static const char * const scs_sels[]           = { "dummy", "sosc", "sirc", "firc", "dummy", "apll_sel", "spll_sel", "dummy", };
 static const char * const ddr_sels[]           = { "apll_pfd_sel", "upll", };
 static const char * const nic_sels[]           = { "firc", "ddr_clk", };
 static const char * const periph_plat_sels[]   = { "dummy", "nic1_bus_clk", "nic1_clk", "ddr_clk", "apll_pfd2", "apll_pfd1", "apll_pfd0", "upll", };