]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/nouveau/fb/gf100-: allocate mmu debug buffers
authorBen Skeggs <bskeggs@redhat.com>
Thu, 14 Apr 2016 00:39:18 +0000 (10:39 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 20 May 2016 04:43:04 +0000 (14:43 +1000)
Later chipsets require setting this up both in FB and GR, so let's just
move the allocation to FB.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
13 files changed:
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.c
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.c
drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h

index 85ab72c7f821eff59e9021cc88d42cf4e63bc1a6..bb9247d88190bffe147081f8e9759a67fd4f12a9 100644 (file)
@@ -55,6 +55,9 @@ struct nvkm_fb {
                struct nvkm_fb_tile region[16];
                int regions;
        } tile;
+
+       struct nvkm_memory *mmu_rd;
+       struct nvkm_memory *mmu_wr;
 };
 
 bool nvkm_fb_memtype_valid(struct nvkm_fb *, u32 memtype);
index da2e47228d7d81849879e71b72ad6f932e5496de..9513badb8220e8dfa01f4fa5f129692507f90c01 100644 (file)
@@ -1616,30 +1616,10 @@ gf100_gr_oneinit(struct nvkm_gr *base)
 {
        struct gf100_gr *gr = gf100_gr(base);
        struct nvkm_device *device = gr->base.engine.subdev.device;
-       int ret, i, j;
+       int i, j;
 
        nvkm_pmu_pgob(device->pmu, false);
 
-       ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 256, false,
-                             &gr->unk4188b4);
-       if (ret)
-               return ret;
-
-       ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 256, false,
-                             &gr->unk4188b8);
-       if (ret)
-               return ret;
-
-       nvkm_kmap(gr->unk4188b4);
-       for (i = 0; i < 0x1000; i += 4)
-               nvkm_wo32(gr->unk4188b4, i, 0x00000010);
-       nvkm_done(gr->unk4188b4);
-
-       nvkm_kmap(gr->unk4188b8);
-       for (i = 0; i < 0x1000; i += 4)
-               nvkm_wo32(gr->unk4188b8, i, 0x00000010);
-       nvkm_done(gr->unk4188b8);
-
        gr->rop_nr = gr->func->rops(gr);
        gr->gpc_nr = nvkm_rd32(device, 0x409604) & 0x0000001f;
        for (i = 0; i < gr->gpc_nr; i++) {
@@ -1736,8 +1716,6 @@ gf100_gr_dtor(struct nvkm_gr *base)
        gf100_gr_dtor_init(gr->fuc_sw_ctx);
        gf100_gr_dtor_init(gr->fuc_sw_nonctx);
 
-       nvkm_memory_del(&gr->unk4188b8);
-       nvkm_memory_del(&gr->unk4188b4);
        return gr;
 }
 
@@ -1822,6 +1800,7 @@ int
 gf100_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
+       struct nvkm_fb *fb = device->fb;
        const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
        u32 data[TPC_MAX / 8] = {};
        u8  tpcnr[GPC_MAX];
@@ -1834,8 +1813,8 @@ gf100_gr_init(struct gf100_gr *gr)
        nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000);
        nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
        nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
-       nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8);
-       nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8);
+       nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
+       nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
 
        gf100_gr_mmio(gr, gr->func->mmio);
 
index 9a2c7bacc0e6b67a659291daeb9daaaa0616f24c..90c70e777dffb142a500cf0a74be31294fd6857b 100644 (file)
@@ -101,9 +101,6 @@ struct gf100_gr {
        u8 ppc_mask[GPC_MAX];
        u8 ppc_tpc_nr[GPC_MAX][4];
 
-       struct nvkm_memory *unk4188b4;
-       struct nvkm_memory *unk4188b8;
-
        struct gf100_gr_data mmio_data[4];
        struct gf100_gr_mmio mmio_list[4096/8];
        u32  size;
index cf7d6a5c24765a1fe0296e32da25c0d50a199c69..2aebae4df2fda06b5569925a5856d16965b3139d 100644 (file)
@@ -24,6 +24,8 @@
 #include "gf100.h"
 #include "ctxgf100.h"
 
+#include <subdev/fb.h>
+
 #include <nvif/class.h>
 
 /*******************************************************************************
@@ -181,6 +183,7 @@ int
 gk104_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
+       struct nvkm_fb *fb = device->fb;
        const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
        u32 data[TPC_MAX / 8] = {};
        u8  tpcnr[GPC_MAX];
@@ -193,8 +196,8 @@ gk104_gr_init(struct gf100_gr *gr)
        nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000);
        nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
        nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
-       nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8);
-       nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8);
+       nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
+       nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
 
        gf100_gr_mmio(gr, gr->func->mmio);
 
index d28feb4465f9ce8260c982e585eb47d00d8c1785..a40509376ece0b8bc22a5e41df12306808862b93 100644 (file)
@@ -22,6 +22,7 @@
 #include "gf100.h"
 #include "ctxgf100.h"
 
+#include <subdev/fb.h>
 #include <subdev/timer.h>
 
 #include <nvif/class.h>
@@ -219,6 +220,7 @@ int
 gk20a_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
+       struct nvkm_fb *fb = device->fb;
        const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
        u32 data[TPC_MAX / 8] = {};
        u8  tpcnr[GPC_MAX];
@@ -239,8 +241,8 @@ gk20a_gr_init(struct gf100_gr *gr)
                return ret;
 
        /* MMU debug buffer */
-       nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(gr->unk4188b4) >> 8);
-       nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(gr->unk4188b8) >> 8);
+       nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(fb->mmu_wr) >> 8);
+       nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(fb->mmu_rd) >> 8);
 
        if (gr->func->init_gpc_mmu)
                gr->func->init_gpc_mmu(gr);
index c4f5500be23407740e1593a24b87721d1ee6e266..487bd65b167d80ff0ece39c0da3fdacb5e7abb31 100644 (file)
@@ -26,6 +26,7 @@
 
 #include <subdev/bios.h>
 #include <subdev/bios/P0260.h>
+#include <subdev/fb.h>
 
 #include <nvif/class.h>
 
@@ -311,6 +312,7 @@ int
 gm107_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
+       struct nvkm_fb *fb = device->fb;
        const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
        u32 data[TPC_MAX / 8] = {};
        u8  tpcnr[GPC_MAX];
@@ -320,8 +322,8 @@ gm107_gr_init(struct gf100_gr *gr)
        nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000);
        nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
        nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
-       nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(gr->unk4188b4) >> 8);
-       nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(gr->unk4188b8) >> 8);
+       nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
+       nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
 
        gf100_gr_mmio(gr, gr->func->mmio);
 
index 47b8d6ffb1ef8f40c28722058f8d528296363ce2..6e992c6f9532d904774e42c50fdb215430433e2b 100644 (file)
@@ -24,6 +24,7 @@
 #include "gf100.h"
 #include "ctxgf100.h"
 
+#include <subdev/fb.h>
 #include <subdev/secboot.h>
 
 #include <nvif/class.h>
@@ -56,6 +57,7 @@ int
 gm200_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
+       struct nvkm_fb *fb = device->fb;
        const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
        u32 data[TPC_MAX / 8] = {};
        u8  tpcnr[GPC_MAX];
@@ -63,8 +65,8 @@ gm200_gr_init(struct gf100_gr *gr)
        int i;
 
        /*XXX: belongs in fb */
-       nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(gr->unk4188b4) >> 8);
-       nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(gr->unk4188b8) >> 8);
+       nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(fb->mmu_wr) >> 8);
+       nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(fb->mmu_rd) >> 8);
        nvkm_mask(device, 0x100cc4, 0x00040000, 0x00040000);
        gr->func->init_gpc_mmu(gr);
 
index f1a1a52aab127b2e15ebfcaba7f9a663910e2ba8..ce90242b8cceeca8718b2daa7c1c6e8553d77db5 100644 (file)
@@ -24,6 +24,7 @@
 #include "priv.h"
 #include "ram.h"
 
+#include <core/memory.h>
 #include <subdev/bios.h>
 #include <subdev/bios/M0203.h>
 #include <engine/gr.h>
@@ -142,6 +143,9 @@ nvkm_fb_dtor(struct nvkm_subdev *subdev)
        struct nvkm_fb *fb = nvkm_fb(subdev);
        int i;
 
+       nvkm_memory_del(&fb->mmu_wr);
+       nvkm_memory_del(&fb->mmu_rd);
+
        for (i = 0; i < fb->tile.regions; i++)
                fb->func->tile.fini(fb, i, &fb->tile.region[i]);
 
index 008bb9849f3b42cf462370dfa46188e8e01f1777..e649ead5ccfc74c7416e78f4294d7d1bcdbbf9b3 100644 (file)
@@ -24,6 +24,9 @@
 #include "gf100.h"
 #include "ram.h"
 
+#include <core/memory.h>
+#include <core/option.h>
+
 extern const u8 gf100_pte_storage_type_map[256];
 
 bool
@@ -46,6 +49,28 @@ gf100_fb_intr(struct nvkm_fb *base)
                nvkm_debug(subdev, "PBFB intr\n");
 }
 
+int
+gf100_fb_oneinit(struct nvkm_fb *fb)
+{
+       struct nvkm_device *device = fb->subdev.device;
+       int ret, size = 0x1000;
+
+       size = nvkm_longopt(device->cfgopt, "MmuDebugBufferSize", size);
+       size = min(size, 0x1000);
+
+       ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000,
+                             false, &fb->mmu_rd);
+       if (ret)
+               return ret;
+
+       ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, size, 0x1000,
+                             false, &fb->mmu_wr);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
 void
 gf100_fb_init(struct nvkm_fb *base)
 {
@@ -98,6 +123,7 @@ gf100_fb_new_(const struct nvkm_fb_func *func, struct nvkm_device *device,
 static const struct nvkm_fb_func
 gf100_fb = {
        .dtor = gf100_fb_dtor,
+       .oneinit = gf100_fb_oneinit,
        .init = gf100_fb_init,
        .intr = gf100_fb_intr,
        .ram_new = gf100_ram_new,
index 0edb3c316f5cdc4ad560ca3ad0de4e3cb360363e..b41f0f70038cb4c8a9d2d0ee464ed7a6fc768392 100644 (file)
@@ -27,6 +27,7 @@
 static const struct nvkm_fb_func
 gk104_fb = {
        .dtor = gf100_fb_dtor,
+       .oneinit = gf100_fb_oneinit,
        .init = gf100_fb_init,
        .intr = gf100_fb_intr,
        .ram_new = gk104_ram_new,
index 81447eb4c948b5f1203d64576ba89f1ebbe867e2..6102e29dbbdfbd25853d9c9f2cb2c8f4046481fe 100644 (file)
@@ -30,6 +30,7 @@ gk20a_fb_init(struct nvkm_fb *fb)
 
 static const struct nvkm_fb_func
 gk20a_fb = {
+       .oneinit = gf100_fb_oneinit,
        .init = gk20a_fb_init,
        .memtype_valid = gf100_fb_memtype_valid,
 };
index 2a91df8655ddb06b452e2193c921fc03a4758b0b..4869fdb753c971f7cc35a880cd3bad06c3efa031 100644 (file)
@@ -27,6 +27,7 @@
 static const struct nvkm_fb_func
 gm107_fb = {
        .dtor = gf100_fb_dtor,
+       .oneinit = gf100_fb_oneinit,
        .init = gf100_fb_init,
        .intr = gf100_fb_intr,
        .ram_new = gm107_ram_new,
index 3c5600cd8ef44cc468ee197a940c1714ad3407d1..d97d640e60a0a32e5e92af83c116128ca8559dce 100644 (file)
@@ -59,5 +59,6 @@ void nv44_fb_tile_prog(struct nvkm_fb *, int, struct nvkm_fb_tile *);
 void nv46_fb_tile_init(struct nvkm_fb *, int i, u32 addr, u32 size,
                       u32 pitch, u32 flags, struct nvkm_fb_tile *);
 
+int gf100_fb_oneinit(struct nvkm_fb *);
 bool gf100_fb_memtype_valid(struct nvkm_fb *, u32);
 #endif